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src/sim/bfin ChangeLog bfin-sim.c


CVSROOT:	/cvs/src
Module name:	src
Changes by:	vapier@sourceware.org	2011-03-24 03:14:20

Modified files:
	sim/bfin       : ChangeLog bfin-sim.c 

Log message:
	sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set
	
	The Blackfin PRM says that the top 8 bits of the accumulator must be
	cleared when using the VIT_MAX insn, so the sim has followed this spec.
	Matching the hardware behavior though when the high bits are not cleared
	is easy to do and doesn't break existing behavior, so go for it.
	
	Signed-off-by: Robin Getz <robin.getz@analog.com>
	Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.15&r2=1.16
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/bfin-sim.c.diff?cvsroot=src&r1=1.10&r2=1.11


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