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src/sim/frv ChangeLog cache.c interrupts.c mem ...
- From: rsandifo at sources dot redhat dot com
- To: gdb-cvs at sources dot redhat dot com
- Date: 1 Mar 2004 09:42:34 -0000
- Subject: src/sim/frv ChangeLog cache.c interrupts.c mem ...
CVSROOT: /cvs/src
Module name: src
Changes by: rsandifo@sourceware.org 2004-03-01 09:42:34
Modified files:
sim/frv : ChangeLog cache.c interrupts.c memory.c model.c
Log message:
cpu/
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
(scutss): Change unit to I0.
(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
(mqsaths): Fix FR400-MAJOR categorization.
(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
combinations.
opcodes/
* frv-desc.c, frv-opc.c: Regenerate.
sim/frv/
* cache.c (frv_cache_init): Change fr400 cache statistics to match
the fr405.
(non_cache_access): Add missing breaks.
* interrupts.c (set_exception_status_registers): Always set EAR15
for data_access_errors.
* memory.c (fr400_check_write_address): Remove redundant alignment
check.
* model.c: Regenerate.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/ChangeLog.diff?cvsroot=src&r1=1.20&r2=1.21
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/cache.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/interrupts.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/memory.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/model.c.diff?cvsroot=src&r1=1.6&r2=1.7