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src/sim/mips ChangeLog Makefile.in configure c ...


CVSROOT:	/cvs/src
Module name:	src
Changes by:	cgd@sources.redhat.com	2002-06-03 14:00:31

Modified files:
	sim/mips       : ChangeLog Makefile.in configure configure.in 
	                 mdmx.c mdmx.igen mips.igen sim-main.h 
Added files:
	sim/mips       : sb1.igen 

Log message:
	2002-06-03  Chris Demetriou  <cgd@broadcom.com>
	Ed Satterthwaite  <ehs@broadcom.com>
	
	* configure.in (mipsisa64sb1*-*-*): New target for supporting
	Broadcom SiByte SB-1 processor configurations.
	* configure: Regenerate.
	* sb1.igen: New file.
	* mips.igen: Include sb1.igen.
	(sb1): New model.
	* Makefile.in (IGEN_INCLUDE): Add sb1.igen.
	* mdmx.igen: Add "sb1" model to all appropriate functions and
	instructions.
	* mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
	(ob_func, ob_acc): Reference the above.
	(qh_acc): Adjust to keep the same size as ob_acc.
	* sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
	(MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/sb1.igen.diff?cvsroot=src&r1=NONE&r2=1.1
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/ChangeLog.diff?cvsroot=src&r1=1.61&r2=1.62
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/Makefile.in.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/configure.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/configure.in.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/mdmx.c.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/mdmx.igen.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/mips.igen.diff?cvsroot=src&r1=1.39&r2=1.40
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/mips/sim-main.h.diff?cvsroot=src&r1=1.14&r2=1.15


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