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src/sim/d10v ChangeLog interp.c simops.c
- From: ezannoni at sources dot redhat dot com
- To: gdb-cvs at sources dot redhat dot com
- Date: 28 May 2002 15:49:54 -0000
- Subject: src/sim/d10v ChangeLog interp.c simops.c
CVSROOT: /cvs/src
Module name: src
Changes by: ezannoni@sources.redhat.com 2002-05-28 08:49:53
Modified files:
sim/d10v : ChangeLog interp.c simops.c
Log message:
2002-05-28 Elena Zannoni <ezannoni@redhat.com>
* interp.c (sim_create_inferior): Add comment.
From Alan Matsuoka <alanm@redhat.com>:
From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
(OP_4401): Output "mvf0t" instead of "mf0t".
(OP_460B): Do not output a flag register.
(OP_4609): Do not output a flag register.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/d10v/ChangeLog.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/d10v/interp.c.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/d10v/simops.c.diff?cvsroot=src&r1=1.2&r2=1.3