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Cortex-M tweaks
- From: Nick Garnett <nickg at ecoscentric dot com>
- To: ecos-patches at ecos dot sourceware dot org
- Date: 13 Feb 2009 17:06:44 +0000
- Subject: Cortex-M tweaks
Fix some minor problems in architecture HAL.
Index: ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/cortexm/arch/current/ChangeLog,v
retrieving revision 1.7
diff -u -5 -r1.7 ChangeLog
--- ChangeLog 9 Feb 2009 15:57:49 -0000 1.7
+++ ChangeLog 13 Feb 2009 17:03:36 -0000
@@ -1,5 +1,10 @@
+2009-02-13 Nick Garnett <nickg@ecoscentric.com>
+
+ * include/hal_arch.h: Add include for var_intr.h.
+ (HAL_IDLE_THREAD_ACTION): Tidy up debug code left in by mistake.
+
2009-02-07 Chris Holgate <chris@zynaptic.com>
* src/hal_misc.c:
* src/cortexm.ld:
Modified SRAM linker section to support initialisation from ROM.
Index: include/hal_arch.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/cortexm/arch/current/include/hal_arch.h,v
retrieving revision 1.2
diff -u -5 -r1.2 hal_arch.h
--- include/hal_arch.h 29 Jan 2009 17:49:15 -0000 1.2
+++ include/hal_arch.h 13 Feb 2009 17:03:36 -0000
@@ -51,10 +51,12 @@
#include <pkgconf/system.h>
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
+#include <cyg/hal/var_arch.h>
+
//==========================================================================
// CPU save state
//
// This is a discriminated union of different save states for threads,
// exceptions and interrupts. State is saved in the most efficient way
@@ -287,14 +289,12 @@
// This macro is called in the idle thread loop, and gives the HAL the
// chance to insert code. Typical idle thread behaviour might be to halt the
// processor. Here we only supply a default fallback if the variant/platform
// doesn't define anything.
-#if 0 //ndef HAL_IDLE_THREAD_ACTION
+#ifndef HAL_IDLE_THREAD_ACTION
#define HAL_IDLE_THREAD_ACTION(__count) __asm__ volatile ( "wfi\n" )
-#else
-#define HAL_IDLE_THREAD_ACTION(__count) CYG_EMPTY_STATEMENT
#endif
//==========================================================================
// Minimal and sensible stack sizes: the intention is that applications
// will use these to provide a stack size in the first instance prior to
--
Nick Garnett eCos Kernel Architect
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