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AT91SAM7S MODFIS bit tweak


After some off-list discussion, this was chosen as a better patch with the MODFIS bit in var_io.h.

Jifl
--
eCosCentric    http://www.eCosCentric.com/    The eCos and RedBoot experts
------["The best things in life aren't things."]------      Opinions==mine
Index: at91/at91sam7s/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/ChangeLog,v
retrieving revision 1.8
diff -u -5 -p -r1.8 ChangeLog
--- at91/at91sam7s/current/ChangeLog	7 Sep 2006 12:11:22 -0000	1.8
+++ at91/at91sam7s/current/ChangeLog	9 Sep 2006 13:24:06 -0000
@@ -1,10 +1,5 @@
-2006-06-01  John Eigelaar <jeigelaar@mweb.co.za>
-
-	* include/plf_io.h: Added definition for SPI Mode Failure Disable bit
-	in the SPI Mode register.
-
 2006-06-01  Andrew Lunn  <andrew.lunn@ascom.ch>
 
 	* cdl/hal_arm_at91sam7s.cdl: Implement the SPI bus 1 interface for
 	the SAM7X and SAM7XC.
 
Index: at91/at91sam7s/current/include/plf_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/at91sam7s/current/include/plf_io.h,v
retrieving revision 1.5
diff -u -5 -p -r1.5 plf_io.h
--- at91/at91sam7s/current/include/plf_io.h	7 Sep 2006 12:11:22 -0000	1.5
+++ at91/at91sam7s/current/include/plf_io.h	9 Sep 2006 13:24:06 -0000
@@ -60,13 +60,10 @@
 #define AT91_SPI1   0xFFFE4000
 #endif
 
 #define AT91_SPI AT91_SPI0
 
-//Extra SPI control bits
-#define AT91_SPI_MR_MODFDIS (1<<4)
-
 // DMA registers 
 #define AT91_SPI_RPR  0x100 // Receive Pointer Register
 #define AT91_SPI_RCR  0x104 // Receive Counter Register
 #define AT91_SPI_TPR  0x108 // Transmit Pointer Register
 #define AT91_SPI_TCR  0x10C // Transmit Counter Register
Index: at91/var/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/var/current/ChangeLog,v
retrieving revision 1.37
diff -u -5 -p -r1.37 ChangeLog
--- at91/var/current/ChangeLog	31 Aug 2006 14:54:56 -0000	1.37
+++ at91/var/current/ChangeLog	9 Sep 2006 13:24:07 -0000
@@ -1,5 +1,9 @@
+2006-09-08  John Eigelaar <jeigelaar@mweb.co.za>
+
+	* include/var_io.h: Added definition for SPI MODFDIS bit 
+
 2006-08-31  Oyvind Harboe <oyvind.harboe@zylin.com>
 
 	* src/at91_misc.c: Now also resets external circuitry via
 	AT91_WD_OMR_EXTEN
 	
Index: at91/var/current/include/var_io.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/at91/var/current/include/var_io.h,v
retrieving revision 1.17
diff -u -5 -p -r1.17 var_io.h
--- at91/var/current/include/var_io.h	2 Jun 2006 18:14:35 -0000	1.17
+++ at91/var/current/include/var_io.h	9 Sep 2006 13:24:09 -0000
@@ -1322,10 +1322,13 @@
 #define AT91_SPI_MR            0x04              // Mode Register
 #define AT91_SPI_MR_MSTR       0x00000001        // Master/Slave Mode 
 #define AT91_SPI_MR_PS         0x00000002        // Peripheral Select
 #define AT91_SPI_MR_PCSDEC     0x00000004        // Chip Select Decode
 #define AT91_SPI_MR_DIV32      0x00000008        // Clock Selection 
+#if defined(CYGHWR_HAL_ARM_AT91SAM7)
+#define AT91_SPI_MR_MODFDIS (1<<4)               // Mode Failure Detect Disable
+#endif
 #define AT91_SPI_MR_LLB        0x00000080        // Local Loopback Enable
 #define AT91_SPI_MR_PCS(x)     (((x)&0x0F)<<16)  // Peripheral Chip Select
 #define AT91_SPI_MR_DLYBCS(x)  (((x)&0xFF)<<24)  // Delay Between Chip Selects
 #define AT91_SPI_RDR           0x08              // Receive Data Register
 #define AT91_SPI_TDR           0x0C              // Transmit Data Register

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