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Re: Generic 8250 serial diagnostics.
Bart Veer wrote:
>>>>>>"David" == David Vrabel <dvrabel@arcom.com> writes:
>
>
> David> Bart Veer wrote:
> >> It should go into a new devs/serial/generic/16x5x-haldiag package.
>
> That is some rather selective quoting, since what I actually wrote is:
Er. Yeah, I got a bit over-zealous with the quote trimmage there and
ended up misrepresenting what you said. Sorry.
> It should go into either the existing devs/serial/generic/16x5x,
> thus keeping all the 16x5x quirks in one package, or into a new
> devs/serial/generic/16x5x-haldiag package. I have a slight
> preference for the former but there may be too many existing CDL
> active_if constraints in the way.
> David> A few Qs:
>
> David> What should the parent of the new package be?
>
> I think there are two main possibilities. The simplest would be to
> just parent it under CYGPKG_HAL. Since currently it does not contain
> any useful configuration options its location does not matter. An
> alternative and probably better approach is to require every platform
> that uses the shared 16x5x HAL diag routines to provide a
> cdl_component CYGPKG_HAL_DIAG and parent under that. If the platform
> provides other diagnostic channels, e.g. the PC's screen and keyboard,
> those could also be parented under CYGPKG_HAL_DIAG.
>
> Unfortunately there is no easy way to make this flexible. The parent
> property takes the name of another configuration option rather than an
> expression. If it was an expression then bits of the hierarchy could
> move around as the configuration was modified, and that would require
> non-trivial surgery to the graphical configtool.
Why does it need to be flexible? It'd be confusing to a user for a
package to appear in two different places depending on what platform is
being used. And it's easy enough to a add an trivial CYGPKG_HAL_DIAG to
a new platform or one you're converting to using the 16x5x hal diag.
I favour CYGPKG_HAL_DIAG as it would allow the enhancements proposed
below to be implemented in the future. i.e., a platform could either
use the existing function to register diag channels or the CDL could
require (an as yet non-existant) option which would cause the
16x5x-hal-diag package to register the channels itself.
The platform CDL would provide something like this:
cdl_component CYGPKG_HAL_DIAG {
display "HAL diagnostic channel options"
parent CYGPKG_HAL
active_if CYGPKG_HAL
flavor none
no_define
description "The component includes options related to the
diagnostic/debug channels provided by the HAL."
requires CYGPKG_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG
}
> Ideally the 16x5x HAL diag component would provide more
> configurability, e.g. allowing users to use only COM1 or only COM2 as
> the diag channel, and perhaps the baud rate options would go there as
> well. A platform HAL's CDL would only specify how many 16x5x UARTs are
> available, and plf_io.h would define the base address, ISR vector, and
> clock frequency. That may be too big a change at this point.
I can put this on my big list of things-to-do but I won't be able to get
around to it anytime soon.
> David> Is there a better way of handling the
> David> CYGINT_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG_REQUIRED
> David> interface that doesn't require you to create the interface
> David> in every package that wants to implement the interface?
>
> If you are putting the code into a separate package I am not sure why
> it is needed. If the target definition includes the package then there
> must be one or more 16x5x UARTs suitable for HAL diagnostics. Why
> define a separate interface which provides exactly the same
> information?
I just copied the way the 16x5x package worked. I'll get rid of the
interface if you think it unnecessary.
I've attached an updated patch with these changes, as well as a 'brown
paper bag' fix to the baud rate changing code.
Do you also want the patches to update the PC and IXP4xx HALs? Or would
you prefer existing platforms to be left alone?
David Vrabel
--
David Vrabel, Design Engineer
Arcom, Clifton Road Tel: +44 (0)1223 411200 ext. 3233
Cambridge CB1 7EA, UK Web: http://www.arcom.com/
%status
pending
%patch
Index: ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/cdl/ser_generic_16x5x_hal_diag.cdl
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/cdl/ser_generic_16x5x_hal_diag.cdl 2006-01-23 13:36:39.000000000 +0000
@@ -0,0 +1,58 @@
+# ====================================================================
+#
+# ser_generic_16x5x.cdl
+#
+# eCos serial 16x5x configuration data
+#
+# ====================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2006 eCosCentric Ltd.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s): David Vrabel <dvrabel@arcom.com>
+# Date: 2006-01-03
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+
+
+cdl_package CYGPKG_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG {
+ display "16x5x generic serial diagnostic channel drivers"
+ parent CYGPKG_HAL_DIAG
+
+ include_dir cyg/io
+
+ compile ser_16x5x_hal_diag.c
+}
Index: ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/include/ser_16x5x_hal_diag.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/include/ser_16x5x_hal_diag.h 2006-01-23 13:36:39.000000000 +0000
@@ -0,0 +1,72 @@
+#ifndef CYGONCE_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG_H
+#define CYGONCE_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG_H
+/*=============================================================================
+//
+// ser_16x5x_hal_diag.h
+//
+// HAL Support for Kernel Diagnostic Routines for 16x5x UARTs
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+//
+// Copyright (C) 2005 eCosCentric Ltd.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): David Vrabel <dvrabel@arcom.com>
+// Date: 2005-09-15
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+/*
+ * UART features
+ */
+#define UART_FEATURE_HAVE_UUE 0x1 /* Have UART Unit Enable bit in IER */
+
+typedef struct {
+ unsigned freq; /* frequeny of UART clock in Hz */
+ unsigned base; /* MMIO address or I/O port */
+ int regshift; /* shift to register offset */
+ int isr_vector;
+ unsigned uart_features;
+ int baud_rate;
+ cyg_int32 msec_timeout;
+ cyg_bool valid;
+} serial_16x5x_channel_data_t;
+
+/*
+ * Register new diagnostics channels.
+ */
+externC void cyg_serial_16x5x_diag_init(serial_16x5x_channel_data_t *channels, int num);
+
+#endif // CYGONCE_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG_H
Index: ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/src/ser_16x5x_hal_diag.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/src/ser_16x5x_hal_diag.c 2006-01-05 11:05:02.000000000 +0000
@@ -0,0 +1,381 @@
+//=============================================================================
+//
+// ser_16x5x_hal_diag.c
+//
+// HAL diagnostic output code for 16x5x UARTs
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+//
+// Copyright (C) 2005 eCosCentric Ltd.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): David Vrabel <dvrabel@arcom.com>
+// Date: 2005-09-15
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <pkgconf/hal.h>
+
+#include <cyg/infra/cyg_type.h> // base types
+
+#include <cyg/hal/hal_arch.h> // basic machine info
+#include <cyg/hal/hal_intr.h> // interrupt macros
+#include <cyg/hal/hal_io.h> // IO macros
+#include <cyg/hal/drv_api.h>
+#include <cyg/hal/hal_if.h> // interface API
+#include <cyg/hal/hal_misc.h>
+
+#include <cyg/io/ser_16x5x_hal_diag.h>
+
+
+/* 8250/16x50 UART registers */
+#define UART_RBR 0x00 // Receive Buffer Register
+
+#define UART_THR 0x00 // Transmit Holding Register
+
+#define UART_IER 0x01 // Interrupt Enable Register
+# define UART_IER_RCV 0x01
+# define UART_IER_XMT 0x02
+# define UART_IER_LS 0x04
+# define UART_IER_MS 0x08
+# define UART_IER_UUE 0x40 // UART Unit Enable bit
+
+#define UART_IIR 0x02 // Interrupt Identification Register
+
+#define UART_FCR 0x02 // FIFO Control Register
+
+#define UART_LCR 0x03 // Line Control Register
+# define UART_LCR_WLS0 0x01 // word length select bit 0
+# define UART_LCR_WLS1 0x02 // word length select bit 1
+# define UART_LCR_STB 0x04 // number of stop bits
+# define UART_LCR_PEN 0x08 // parity enable
+# define UART_LCR_EPS 0x10 // even parity select
+# define UART_LCR_SP 0x20 // stick parity
+# define UART_LCR_SB 0x40 // set break
+# define UART_LCR_DLAB 0x80 // divisor latch access bit
+
+#define UART_MCR 0x04 // Modem Control Register
+# define UART_MCR_DTR 0x01
+# define UART_MCR_RTS 0x02
+# define UART_MCR_INT 0x08 // Enable interrupts
+
+#define UART_LSR 0x05 // Line Status Register
+# define UART_LSR_DR 0x01 // data ready
+# define UART_LSR_OE 0x02 // overrun error
+# define UART_LSR_PE 0x04 // parity error
+# define UART_LSR_FE 0x08 // framing error
+# define UART_LSR_BI 0x10 // break interrupt
+# define UART_LSR_THRE 0x20 // transmitter holding register empty
+# define UART_LSR_TEMT 0x40 // transmitter register empty
+# define UART_LSR_ERR 0x80 // any error condition
+
+#define UART_MSR 0x06 // Modem Status Register
+# define UART_MSR_DCTS 0x01 // delta clear to send
+# define UART_MSR_DDSR 0x02 // delta data set ready
+# define UART_MSR_TERI 0x04 // trailing edge ring indicator
+# define UART_MSR_DDCD 0x08 // delta data carrier detect
+# define UART_MSR_CTS 0x10 // clear to send
+# define UART_MSR_DSR 0x20 // data set ready
+# define UART_MSR_RI 0x40 // ring indicator
+# define UART_MSR_DCD 0x80 // data carrier detect
+
+#define UART_DLL 0x00 // Divisor Latch LSB (if DLAB = 1)
+#define UART_DLM 0x01 // Divisor Latch MSB (if DLAB = 1)
+
+
+static void uart_write(serial_16x5x_channel_data_t *chan, int reg, cyg_uint8 data)
+{
+ HAL_WRITE_UINT8(chan->base + (reg << chan->regshift), data);
+}
+
+static cyg_uint8 uart_read(serial_16x5x_channel_data_t *chan, int reg)
+{
+ cyg_uint8 data;
+ HAL_READ_UINT8(chan->base + (reg << chan->regshift), data);
+ return data;
+}
+
+static void set_baud(serial_16x5x_channel_data_t *chan)
+{
+ unsigned divisor;
+ cyg_uint32 lcr;
+
+ divisor = (chan->freq + 8*chan->baud_rate) / (16*chan->baud_rate);
+
+ lcr = uart_read(chan, UART_LCR);
+ uart_write(chan, UART_LCR, lcr | UART_LCR_DLAB);
+ uart_write(chan, UART_DLL, divisor & 0xff);
+ uart_write(chan, UART_DLM, (divisor >> 8) & 0xff);
+ uart_write(chan, UART_LCR, lcr);
+}
+
+static void init_channel(serial_16x5x_channel_data_t *chan)
+{
+ cyg_uint8 ier, lsr;
+
+ ier = 0;
+ if (chan->uart_features & UART_FEATURE_HAVE_UUE)
+ ier |= UART_IER_UUE;
+ uart_write(chan, UART_IER, ier);
+ uart_write(chan, UART_MCR, 0);
+
+ set_baud(chan);
+
+ // 8-1-no parity.
+ uart_write(chan, UART_LCR, UART_LCR_WLS0 | UART_LCR_WLS1);
+
+ // Test whether the channel is valid or not. If the status
+ // register reads back all ones, its a fair bet that it is not
+ // actually there!
+ lsr = uart_read(chan, UART_LSR);
+ chan->valid = (lsr != 0xFF);
+
+ uart_write(chan, UART_FCR, 0x07); // Enable & clear FIFO
+}
+
+static void cyg_serial_16x5x_diag_putc(void *__ch_data, char c)
+{
+ serial_16x5x_channel_data_t *chan = (serial_16x5x_channel_data_t *)__ch_data;
+ cyg_uint8 lsr;
+
+ if (!chan->valid)
+ return;
+
+ CYGARC_HAL_SAVE_GP();
+ do {
+ lsr = uart_read(chan, UART_LSR);
+ } while ((lsr & UART_LSR_THRE) == 0);
+
+ uart_write(chan, UART_THR, c);
+
+ CYGARC_HAL_RESTORE_GP();
+}
+
+static cyg_bool cyg_serial_16x5x_diag_getc_nonblock(void* __ch_data, cyg_uint8* ch)
+{
+ serial_16x5x_channel_data_t *chan = (serial_16x5x_channel_data_t *)__ch_data;
+ cyg_uint8 lsr;
+
+ if (!chan->valid)
+ return false;
+
+ lsr = uart_read(chan, UART_LSR);
+ if ((lsr & UART_LSR_DR) == 0)
+ return false;
+
+ *ch = uart_read(chan, UART_RBR);
+
+ return true;
+}
+
+static cyg_uint8 cyg_serial_16x5x_diag_getc(void* __ch_data)
+{
+ serial_16x5x_channel_data_t *chan = (serial_16x5x_channel_data_t *)__ch_data;
+ cyg_uint8 ch;
+
+ if (!chan->valid)
+ return '\n';
+
+ CYGARC_HAL_SAVE_GP();
+
+ while (!cyg_serial_16x5x_diag_getc_nonblock(__ch_data, &ch));
+
+ CYGARC_HAL_RESTORE_GP();
+
+ return ch;
+}
+
+static void cyg_serial_16x5x_diag_write(void* __ch_data, const cyg_uint8* __buf,
+ cyg_uint32 __len)
+{
+ CYGARC_HAL_SAVE_GP();
+
+ while(__len-- > 0)
+ cyg_serial_16x5x_diag_putc(__ch_data, *__buf++);
+
+ CYGARC_HAL_RESTORE_GP();
+}
+
+static void cyg_serial_16x5x_diag_read(void* __ch_data, cyg_uint8 *__buf, cyg_uint32 __len)
+{
+ CYGARC_HAL_SAVE_GP();
+
+ while(__len-- > 0)
+ *__buf++ = cyg_serial_16x5x_diag_getc(__ch_data);
+
+ CYGARC_HAL_RESTORE_GP();
+}
+
+static cyg_bool cyg_serial_16x5x_diag_getc_timeout(void* __ch_data, cyg_uint8 *ch)
+{
+ serial_16x5x_channel_data_t *chan = (serial_16x5x_channel_data_t *)__ch_data;
+ int delay_count;
+ cyg_bool res;
+
+ CYGARC_HAL_SAVE_GP();
+
+ delay_count = chan->msec_timeout * 10; // delay in 0.1 ms steps
+
+ for(;;) {
+ res = cyg_serial_16x5x_diag_getc_nonblock(__ch_data, ch);
+ if (res || 0 == delay_count--)
+ break;
+
+ CYGACC_CALL_IF_DELAY_US(100);
+ }
+
+ CYGARC_HAL_RESTORE_GP();
+ return res;
+}
+
+
+static int cyg_serial_16x5x_diag_control(void *__ch_data, __comm_control_cmd_t __func, ...)
+{
+ serial_16x5x_channel_data_t *chan = (serial_16x5x_channel_data_t *)__ch_data;
+ static int irq_state = 0;
+ int ret = 0;
+ cyg_uint8 ier;
+ cyg_uint32 b;
+ va_list ap;
+
+ va_start(ap, __func);
+
+ CYGARC_HAL_SAVE_GP();
+
+ switch (__func) {
+ case __COMMCTL_GETBAUD:
+ ret = chan->baud_rate;
+ break;
+ case __COMMCTL_SETBAUD:
+ chan->baud_rate = va_arg(ap, cyg_int32);
+ /* FIXME: Should check that the baud rate is valid? */
+ set_baud(chan);
+ break;
+ case __COMMCTL_IRQ_ENABLE:
+ irq_state = 1;
+
+ ier = UART_IER_RCV;
+ if (chan->uart_features & UART_FEATURE_HAVE_UUE)
+ ier |= UART_IER_UUE;
+ uart_write(chan, UART_IER, ier);
+ uart_write(chan, UART_MCR, UART_MCR_INT | UART_MCR_DTR | UART_MCR_RTS);
+
+ HAL_INTERRUPT_UNMASK(chan->isr_vector);
+ break;
+ case __COMMCTL_IRQ_DISABLE:
+ ret = irq_state;
+ irq_state = 0;
+
+ ier = 0;
+ if (chan->uart_features & UART_FEATURE_HAVE_UUE)
+ ier |= UART_IER_UUE;
+ uart_write(chan, UART_IER, ier);
+
+ HAL_INTERRUPT_MASK(chan->isr_vector);
+ break;
+ case __COMMCTL_DBG_ISR_VECTOR:
+ ret = chan->isr_vector;
+ break;
+ case __COMMCTL_SET_TIMEOUT:
+ ret = chan->msec_timeout;
+ chan->msec_timeout = va_arg(ap, cyg_uint32);
+ break;
+ default:
+ break;
+ }
+
+ CYGARC_HAL_RESTORE_GP();
+
+ va_end(ap);
+
+ return ret;
+}
+
+static int cyg_serial_16x5x_diag_isr(void *__ch_data, int *__ctrlc,
+ CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
+{
+ serial_16x5x_channel_data_t *chan = (serial_16x5x_channel_data_t *)__ch_data;
+ int res = 0;
+ char c;
+ cyg_uint8 lsr;
+
+ CYGARC_HAL_SAVE_GP();
+
+ cyg_drv_interrupt_acknowledge(chan->isr_vector);
+
+ *__ctrlc = 0;
+ lsr = uart_read(chan, UART_LSR);
+ if ( (lsr & UART_LSR_DR) != 0 ) {
+ c = uart_read(chan, UART_RBR);
+ if (cyg_hal_is_break(&c , 1))
+ *__ctrlc = 1;
+ }
+
+ res = CYG_ISR_HANDLED;
+
+ CYGARC_HAL_RESTORE_GP();
+ return res;
+}
+
+void cyg_serial_16x5x_diag_init(serial_16x5x_channel_data_t *channels, int num)
+{
+ hal_virtual_comm_table_t* comm;
+ int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
+ int i;
+
+ for (i = 0; i < num; i++) {
+ if (channels[i].baud_rate == 0)
+ channels[i].baud_rate = CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD;
+
+ HAL_INTERRUPT_MASK(channels[i].isr_vector);
+
+ init_channel(&channels[i]);
+
+ // Setup procs in the vector table
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(i);
+ comm = CYGACC_CALL_IF_CONSOLE_PROCS();
+ CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[i]);
+ CYGACC_COMM_IF_WRITE_SET(*comm, cyg_serial_16x5x_diag_write);
+ CYGACC_COMM_IF_READ_SET(*comm, cyg_serial_16x5x_diag_read);
+ CYGACC_COMM_IF_PUTC_SET(*comm, cyg_serial_16x5x_diag_putc);
+ CYGACC_COMM_IF_GETC_SET(*comm, cyg_serial_16x5x_diag_getc);
+ CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_serial_16x5x_diag_control);
+ CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_serial_16x5x_diag_isr);
+ CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_serial_16x5x_diag_getc_timeout);
+ }
+
+ // Restore original console
+ CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
+}
Index: ecos-working/packages/ecos.db
===================================================================
--- ecos-working.orig/packages/ecos.db 2006-01-05 11:03:46.000000000 +0000
+++ ecos-working/packages/ecos.db 2006-01-23 13:36:30.000000000 +0000
@@ -1114,6 +1114,15 @@
description "16x5x compatible serial device drivers"
}
+package CYGPKG_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG {
+ alias { "16x5x compatible serial diagnostic channel driver"
+ devs_serial_generic_16x5x_hal_diag }
+ hardware
+ directory devs/serial/generic/16x5x-hal-diag
+ script ser_generic_16x5x_hal_diag.cdl
+ description "16x5x compatible serial diagnostic channel driver"
+}
+
package CYGPKG_IO_SERIAL_SH_SCI {
alias { "SH SCI serial device drivers"
devs_serial_sh_sci sci_serial_driver }
Index: ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/ChangeLog
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ ecos-working/packages/devs/serial/generic/16x5x-hal-diag/current/ChangeLog 2006-01-23 13:36:39.000000000 +0000
@@ -0,0 +1,9 @@
+2005-01-23 David Vrabel <dvrabel@arcom.com>
+
+ * cdl/ser_generic_16x5x_hal_diag.cdl:
+ * include/ser_16x5x_hal_diag.h:
+ * src/ser_16x5x_hal_diag.c:
+ New package CYGPKG_DEVS_SERIAL_GENERIC_16X5X_HAL_DIAG which
+ provides a generic 16x5x serial driver for diagnostic and debug
+ channels. Channels are registered by the HAL with the
+ cyg_serial_16x5x_diag_init() function.