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CSB281 - fix SDRAM drive


This [small] change overrides the hardware defaults to adjust the 
drive "load" on the SDRAM lines.  The new value drives the signals 
at a lower current which is less noisy and more reliable.

-- 
Gary Thomas <gary@mlbassoc.com>
MLB Associates
Index: hal/powerpc/csb281/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/csb281/current/ChangeLog,v
retrieving revision 1.9
diff -u -5 -p -r1.9 ChangeLog
--- hal/powerpc/csb281/current/ChangeLog	18 Mar 2003 17:08:53 -0000	1.9
+++ hal/powerpc/csb281/current/ChangeLog	24 Jun 2003 11:55:08 -0000
@@ -1,5 +1,10 @@
+2003-06-23  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/csb281.S (HW_init): Initialize SDRAM drivers to 40 Ohm (less
+	current/noise, more reliable).
+
 2003-03-18  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/hal_aux.c (_csb281_pci_init): Display PCI bus - disabled.
 
 2003-03-11  Mark Salter  <msalter@redhat.com>
Index: hal/powerpc/csb281/current/src/csb281.S
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/csb281/current/src/csb281.S,v
retrieving revision 1.2
diff -u -5 -p -r1.2 csb281.S
--- hal/powerpc/csb281/current/src/csb281.S	4 Jan 2003 03:38:40 -0000	1.2
+++ hal/powerpc/csb281/current/src/csb281.S	24 Jun 2003 11:55:27 -0000
@@ -103,10 +103,11 @@ HW_init:        
         .long   0x800000DC, 0x7800000D  // RCS3  - 0x78000000..0x79FFFFFF
 #endif        
         .long   0x80000078, _CSB281_EUMBBAR  // EUMBBAR - machine registers
         .long   0x800000A8, 0xFF141110  // PICR1 - RCS0 local, Big Endian, DEC/TB
         .long   0x800000AC, 0x08000000  // PICR2
+        .long   0x80000070, 0x0000001A  // ODCR  - SDRAM driver control
         .long   0
 10:     nop
         mflr    r3              // Pointer to initialization table
         subi    r3,r3,4
         lwi     r4,_CSB281_PCI_CONFIG_ADDR

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