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[APPROVE?] Fix spurious interrupt on mpc8xx


The attached patch fixes a spurious interrupt with asserts enabled when using the serial port on viper. It also does some very minor cleanups.

I haven't checked it in to the trunk, just in case there's some other reasoning for the way things was that I've missed (although I doubt it), but if it's okay, I would also like approval for the 2.0 branch.

Jifl
--
eCosCentric    http://www.eCosCentric.com/    The eCos and RedBoot experts
--[ "You can complain because roses have thorns, or you ]--
--[  can rejoice because thorns have roses." -Lincoln   ]-- Opinions==mine
Index: ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.32
diff -u -5 -p -r1.32 ChangeLog
--- ChangeLog	23 Mar 2003 16:22:14 -0000	1.32
+++ ChangeLog	31 Mar 2003 05:28:23 -0000
@@ -1,5 +1,17 @@
+2003-03-31  Jonathan Larmour  <jifl at eCosCentric dot com>
+
+	* src/quicc_smc1.c (cyg_hal_smcx_init_channel): 
+	(cyg_hal_sccx_init_channel): 
+
+	* src/cpm.c: Include <string.h> for memset().
+	(_mpc8xx_reset_cpm): use CPM busy flag to check reset completion.
+	* src/quicc_smc1.c: Include <string.h> for memset().
+	(cyg_hal_smcx_init_channel): Don't reset CPM here - let variant
+	initialization do it. Only let through RX interrupts.
+	(cyg_hal_sccx_init_channel): Ditto.
+
 2003-03-23  Gary Thomas  <gary at mlbassoc dot com>
 
 	* src/quicc_smc1.c: Use new baud rate generator allocation functions.
 	Merge SMC and SCC output functions.
 	
Index: src/cpm.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/powerpc/quicc/current/src/cpm.c,v
retrieving revision 1.4
diff -u -5 -p -r1.4 cpm.c
--- src/cpm.c	23 Mar 2003 16:22:14 -0000	1.4
+++ src/cpm.c	31 Mar 2003 05:28:24 -0000
@@ -56,10 +56,11 @@
 #include <pkgconf/hal.h>
 #include <pkgconf/hal_powerpc_quicc.h>
 #include <cyg/infra/cyg_type.h>
 #include <cyg/infra/cyg_ass.h>
 #include <cyg/hal/hal_arch.h>
+#include <string.h>           // memset
 
 // eCos headers decribing PowerQUICC:
 #include <cyg/hal/quicc/ppc8xx.h>
 
 // Information about DPRAM usage
@@ -73,19 +74,19 @@ static short *nextBd = (short *)(CYGHWR_
 
 void
 _mpc8xx_reset_cpm(void)
 {
     EPPC *eppc = eppc_base();
-    int i;
     static int init_done = 0;
 
     if (init_done) return;
     init_done++;
 
     eppc->cp_cr = QUICC_CPM_CR_RESET | QUICC_CPM_CR_BUSY;
-    memset(eppc->pram, 0, 0x400);
-    for (i = 0; i < 100000; i++);
+    memset(eppc->pram, 0, sizeof(eppc->pram));
+    while (eppc->cp_cr & QUICC_CPM_CR_BUSY)
+        CYG_EMPTY_STATEMENT;
 
     *nextBd = QUICC_BD_BASE;
 }
 
 //
Index: src/quicc_smc1.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/powerpc/quicc/current/src/quicc_smc1.c,v
retrieving revision 1.26
diff -u -5 -p -r1.26 quicc_smc1.c
--- src/quicc_smc1.c	23 Mar 2003 16:22:14 -0000	1.26
+++ src/quicc_smc1.c	31 Mar 2003 05:28:24 -0000
@@ -69,10 +69,11 @@
 #include <cyg/hal/hal_stub.h>           // target_register_t
 #include <cyg/hal/hal_intr.h>           // HAL_INTERRUPT_UNMASK(...)
 #include <cyg/hal/hal_if.h>             // Calling interface definitions
 #include <cyg/hal/hal_misc.h>           // Helper functions
 #include <cyg/hal/drv_api.h>            // CYG_ISR_HANDLED
+#include <string.h>                     // memset
 
 #define UART_BIT_RATE(n) (((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
 #define UART_BAUD_RATE CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
 
 // Note: buffers will be placed just after descriptors
@@ -142,12 +143,10 @@ cyg_hal_smcx_init_channel(struct port_in
     struct cp_bufdesc *txbd, *rxbd;
 
     if (info->init) return;
     info->init = 1;
 
-    _mpc8xx_reset_cpm();
-
     switch (port) {
 #if CYGNUM_HAL_QUICC_SMC1 > 0
     case QUICC_CPM_SMC1:
         /*
          *  Set up the PortB pins for UART operation.
@@ -237,11 +236,11 @@ cyg_hal_smcx_init_channel(struct port_in
     /*
      *  Clear any previous events. Mask interrupts.
      *  (Section 16.15.7.14 and 16.15.7.15)
      */
     regs->smc_smce = 0xff;
-    regs->smc_smcm = 5;
+    regs->smc_smcm = 1; // RX interrupts only, for ctrl-c
 
     /*
      *  Set 8,n,1 characters, then also enable rx and tx.
      *  (Section 16.15.7.11)
      */
@@ -569,12 +568,10 @@ cyg_hal_sccx_init_channel(struct port_in
     struct cp_bufdesc *txbd, *rxbd;
 
     if (info->init) return;
     info->init = 1;
 
-    _mpc8xx_reset_cpm();
-
     /*
      *  Set up the Port pins for UART operation.
      */
     switch (port) {
 #if CYGNUM_HAL_QUICC_SCC1 > 0
@@ -701,12 +698,11 @@ cyg_hal_sccx_init_channel(struct port_in
     /*
      *  Clear any previous events. Mask interrupts.
      *  (Section 16.15.7.14 and 16.15.7.15)
      */
     regs->scc_scce = 0xffff;
-    regs->scc_sccm = 5;
-    regs->scc_sccm = 3;
+    regs->scc_sccm = 1; // RX interrupts only, for ctrl-c
 
     /*
      *  Set 8,n,1 characters
      */
     regs->scc_psmr = (3<<12);

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