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PowerPC - fix SCC2 initialization
- From: Gary Thomas <gary at mlbassoc dot com>
- To: eCos patches <ecos-patches at sources dot redhat dot com>
- Date: 18 Mar 2003 07:37:44 -0700
- Subject: PowerPC - fix SCC2 initialization
Index: hal/powerpc/quicc/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -5 -p -r1.29 -r1.30
--- hal/powerpc/quicc/current/ChangeLog 7 Mar 2003 02:34:57 -0000 1.29
+++ hal/powerpc/quicc/current/ChangeLog 18 Mar 2003 14:03:27 -0000 1.30
@@ -1,5 +1,10 @@
+2003-03-18 Gary Thomas <gary at mlbassoc dot com>
+
+ * src/quicc_smc1.c (cyg_hal_sccx_init_channel): Update initialization
+ for SCC2 - *CAUTION* not tested on actual hardware.
+
2003-03-06 Gary Thomas <gary at mlbassoc dot com>
* src/cpm.c: Handle case where DPRAM allocation is unknown.
* include/ppc8xx.h: Define limits of CPM/DPRAM space.
Index: hal/powerpc/quicc/current/src/quicc_smc1.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/src/quicc_smc1.c,v
retrieving revision 1.24
retrieving revision 1.25
diff -u -5 -p -r1.24 -r1.25
--- hal/powerpc/quicc/current/src/quicc_smc1.c 5 Mar 2003 17:15:44 -0000 1.24
+++ hal/powerpc/quicc/current/src/quicc_smc1.c 18 Mar 2003 14:03:27 -0000 1.25
@@ -618,30 +618,30 @@ cyg_hal_sccx_init_channel(struct port_in
break;
#endif
#if CYGNUM_HAL_QUICC_SCC2 > 0
case QUICC_CPM_SCC2:
#error FIXME
- eppc->pio_papar |= 0x03;
- eppc->pio_padir &= ~0x03;
- eppc->pio_paodr &= ~0x03;
+ eppc->pio_papar |= 0x0C;
+ eppc->pio_padir &= ~0x0C;
+ eppc->pio_paodr &= ~0x0C;
/* CTS on PortC.11 */
- eppc->pio_pcdir &= 0x800;
- eppc->pio_pcpar &= 0x800;
- eppc->pio_pcso |= 0x800;
+ eppc->pio_pcdir &= 0xC00;
+ eppc->pio_pcpar &= 0xC00;
+ eppc->pio_pcso |= 0xC00;
/* RTS on PortB.19 */
- eppc->pip_pbpar |= 0x1000;
- eppc->pip_pbdir |= 0x1000;
+ eppc->pip_pbpar |= 0x2000;
+ eppc->pip_pbdir |= 0x2000;
/* Configure baud rate generator (Section 16.13.2) */
eppc->brgc2 = 0x10000 | (UART_BIT_RATE(UART_BAUD_RATE)<<1);
/*
- * NMSI mode, BRG2 to SCC1
+ * NMSI mode, BRG2 to SCC2
*/
- eppc->si_sicr |= (1<<3)|(1<<0);
+ eppc->si_sicr |= (1<<11)|(1<<8);
break;
#endif
#if CYGNUM_HAL_QUICC_SCC3 > 0
case QUICC_CPM_SCC3:
#if 0
--
------------------------------------------------------------
Gary Thomas |
MLB Associates | Consulting for the
+1 (970) 229-1963 | Embedded world
http://www.mlbassoc.com/ |
email: <gary at mlbassoc dot com> |
gpg: http://www.chez-thomas.org/gary/gpg_key.asc
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