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ARM stub tweak


Index: hal/arm/arch/current/ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/ChangeLog,v
retrieving revision 1.77
diff -u -p -5 -r1.77 ChangeLog
--- hal/arm/arch/current/ChangeLog	29 Aug 2002 11:49:48 -0000	1.77
+++ hal/arm/arch/current/ChangeLog	12 Nov 2002 21:44:01 -0000
@@ -1,5 +1,10 @@
+2002-11-12  Mark Salter  <msalter@redhat.com>
+
+	* src/arm_stub.c (target_ins): Account for PC prefetch when PC is
+	source register in data processing insns.
+
 2002-08-29  Mark Salter  <msalter@redhat.com>
 
 	* src/vectors.S: Avoid entering thumb mode in exception handlers.
 
 2002-08-27  Mark Salter  <msalter@redhat.com>
Index: hal/arm/arch/current/src/arm_stub.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/arm/arch/current/src/arm_stub.c,v
retrieving revision 1.24
diff -u -p -5 -r1.24 arm_stub.c
--- hal/arm/arch/current/src/arm_stub.c	22 Aug 2002 12:24:21 -0000	1.24
+++ hal/arm/arch/current/src/arm_stub.c	12 Nov 2002 21:44:01 -0000
@@ -378,10 +378,11 @@ target_ins(unsigned long *pc, unsigned l
         new_pc = (unsigned long)(pc+1);
         if ((ins & 0x0000F000) == 0x0000F000) {
             // Destination register is PC
             if ((ins & 0x0FBF0000) != 0x010F0000) {
                 Rn = (unsigned long)get_register((ins & 0x000F0000) >> 16);
++		if ((ins & 0x000F0000) == 0x000F0000) Rn += 8;  // PC prefetch!
                 if ((ins & 0x02000000) == 0) {
                     op2 = RmShifted(ins & 0x00000FFF);
                 } else {
                     op2 = ins & 0x000000FF;
                     i = (ins & 0x00000F00) >> 8;  // Rotate count                


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