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Re: asymmetric block size in Strata P30/P33 flash


Jacob Avraham wrote:
Hi,

I'm about to bringup an IXP420-based board with a Strata P33 flash on
it.
I'm using Redboot 2.02.
I wonder if Redboot can handle the fact that this chip has 2 erase block
sizes:
128k and 32k. I saw in the code that there is one variable for the block
size,
so it makes me suspicious...

This is handled by mapping the 32K blocks onto a 128K block. Look at how the AMD drivers handle it.

--
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Gary Thomas                 |  Consulting for the
MLB Associates              |    Embedded world
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