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linking & cdl question


I have some Xilinx fpga configuration data used in my hal startup
that I want to link into my ROM redboot images, but not in the RAM
versions since presumably redboot has already dealt with the
configuration at startup.

I have managed to get the raw binary data file into an
elf .o file with a .rodata section and some symbols defining
the start and end, but I'm not sure how to reference it in
cdl and get it linked.

a couple of questions:

would it make sense to put it into the main library or should 
it go into extras (will the rodata section get removed if
there is no reference to the start and end symbols)?

How do i just specify a .o file to link with no build rule?

Would it be easier to have a make rule somewhere to say
how to make the .o file from a raw binary file?
How does one go about this?

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Andrew Dyer               |  adyer@righthandtech.com
Sr. Engineer              |  (630) 238-0789
RightHand Technologies    |  (630) 238-0469 (fax)
735 N. Edgewood Ave.      |
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