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Re: i386 affects IRQ lines?


Bob Holmberg <bob_holmberg@yahoo.com> writes:

> Hello,
> 
> I am using eCos for servo control and need to 
> have a 500 Hz servo loop.  I have an I/O card
> (ServoToGo) which generates low pulses on the
> IRQ11 (configurable) that I observe on an
> ocsilliscope.  The problem is that it appears
> that eCos causes the IRQ11 line to go low 
> when it exits main.cxx after exiting my
> cyg_user_start().  In the mean time, the servo
> thread has initialized and paused at a 
> cyg_semaphore_wait() -- ie. my servo tick.
> 
> I didn't think eCos would be able to affect the
> state of the IRQ lines directly, but I have ruled
> out everything else.  When I use the debugger, 
> I can get the pulses on the IRQ11 line to start,
> then I hit the reset line on the PC and the pulses
> continue throughout the bios, and redboot startup.
> Only when I start my application code, during the
> eCos initialization, before I get to my application
> code, the IRQ pulses are replaced by a steady low 
> on the IRQ line.


This is very weird. eCos will not be doing anything to affect the
behaviour of your hardware like this. I can think of a few of
things that might be happening:

1. You say that it fails on startup. One of the first things that
   happens when the scheduler starts is usually a clock interrupt. If
   your hardware is in some way reponding to the acknowledge meant for
   the clock then that might have an affect.

2. Does something else, like the ethernet card, think it is attached
   to IRQ11?

3. Maybe some code in eCos is inadvertently disabling your
   hardware. Is it clashing with something else? Maybe ethernet again?


Sorry not to be much help here. 


> 
> I have followed the examples for interrupts, ISR,
> and DSR in the Massa book, and read the updates 
> to the documention here.  
> 
> I am looking for suggestions of new approaches
> to get my ISR/DSR to be triggered by the external
> IRQ interrupt.
> 
> My setup:
> -Intel PII 450MHz Single Board Computer
> -ISA I/O card (ServoToGo) at 0x300 with 82C59
> interrupt controller.  It is set up to generate IRQ
> pulses
> without being acknowledged by the CPU.

I just noticed this. Does the card have its own PIC? How is it
programmed? Where does it cascade into the main PICs? What vector base
is it set up with? eCos reprograms the standard PICs to different
vector addresses from the default. Even if the card's PIC does not
need the EOI, the main and slave PICs do. 


> -eCos 2.0 beta updated from CVS 09-May-2003
> -template: i386 PC target, with net package
> 
> Regards,
> Bob Holmberg
> 
> 
> -- 
> Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
> and search the list archive: http://sources.redhat.com/ml/ecos-discuss
> 
> 

-- 
Nick Garnett                    eCos Kernel Architect
http://www.ecoscentric.com/     The eCos and RedBoot experts


-- 
Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
and search the list archive: http://sources.redhat.com/ml/ecos-discuss


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