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Re: Serial overruns
- To: "Robert Cragie" <rcc at jennic dot com>
- Subject: Re: [ECOS] Serial overruns
- From: Matt Holgate <matt at dcs dot gla dot ac dot uk>
- Date: 19 Sep 2001 20:58:55 +0100
- Cc: "Jonathan Larmour" <jlarmour at redhat dot com>, <ecos-discuss at sources dot redhat dot com>
- References: <NDBBLOIOMLKELOJBAPAGEECOCJAA.rcc@jennic.com>
"Robert Cragie" <rcc@jennic.com> writes:
> I have subsequently modified my serial port drivers to only disable the
> interrupts which are handled in the DSR, i.e. leave Rx interrupts enabled,
> and to use the interim buffer. This seems to have fixed the problem - I can
> now run out of flash with no overrun errors.
That seems like a good idea. My solution was a very quick hack just to
test things out -- it just handled RX interrupts in the ISR, and set a
flag when TX interrupts occurred which were later handled in the DSR.
I ignored the status interrupts, just so I could see if the
intermediate buffer helped at all.
I didn't mask any interrupts at the end of the ISR though, and I still
got the overrun problems, which makes me wonder if something else
strange is going on...haven't had much chance to look at it today, but
hope to investigate further tomorrow.
> I am in the process of applying the equivalent changes to ser_16x5x.c, but I
> have no way of testing it. It's not quite as straightforward as the ARM
> Prime Cell UART to implement. If you'd like me to send you the completed
> file, let me know.
That would be good, thanks.
Thanks for all your help with this,
Matt