[ECOS] One more memory mapping question

[Cristiano Ligieri Pereira <cpereira at ics dot uci dot edu>]

Hi all,

I'm working on the port of an XScale board. The memory mapping I'm using
is the following:

. Physical (from the documentation)
+----------------------------+-------+--------+--------------------------+
| 80200 Address Range          Size     Width   Peripheral               |
+----------------------------+-------+--------+--------------------------+
| 0xC2000000 - 0xFFFFFFFF    |  -    |  -     | Invalid                  |
| 0xC0000000 - 0xC1FFFFFF    |  32   |  64    | SDRAM                    |
| 0x00700000 - 0xBFFFFFFF    |  -    |  -     | Invalid                  |
| 0x00600000 - 0x006FFFFF    |  1    |  8     | CS3# - (future expansion)|
| 0x00500000 - 0x005FFFFF    |  1    |  8     | CS2# - Numeric LED       |
| 0x00400000 - 0x004FFFFF    |  1    |  8     | CS1# - 16C550 UART       |
| 0x00000000 - 0x003FFFFF    |  4    |  8     | CS0# - Flash             |
+----------------------------+-------+--------+--------------------------+

. Logical
+----------------------------+-------+--------+--------------------------+
| 80200 Address Range          Size     Width   Peripheral               |
+----------------------------+-------+--------+--------------------------+
| 0xC2000000 - 0xFFFFFFFF    |  -    |  -     | Invalid                  |
| 0xC0400000 - 0xC1FFFFFF    |  28   |  64    | SDRAM                    |
| 0xC0000000 - 0xC03FFFFF    |  4    |  8     | CS0# - Flash             |
| 0x00700000 - 0xBFFFFFFF    |  -    |  -     | Invalid                  |
| 0x00600000 - 0x006FFFFF    |  1    |  8     | CS3# - (future expansion)|
| 0x00500000 - 0x005FFFFF    |  1    |  8     | CS2# - Numeric LED       |
| 0x00400000 - 0x004FFFFF    |  1    |  8     | CS1# - 16C550 UART       |
| 0x00000000 - 0x003FFFFF    |  4    |  64    | SDRAM                    |
+----------------------------+-------+--------+--------------------------+

I'm switching the FLASH and SDRAM memory so that I have SDRAM at 0x0 and
consequently the vectors can be installed in the address 0x0 and no
drastic changes are needed in the independent source code (like
vectos.S). I have some questions:

1. As you can see I'm mapping 4MB of SDRAM in the first 4MB addresses.
Then the flash memory at address 0xC0000000 and the rest of SDRAM at the
address 0xC0400000. I'll be wasting the 28MB of SDRAM memory at address
0xC0400000 if I don't tell eCos about it, right? How should I deal with
this? 

2. Do I need to defined to memory regions in the memory mapping files? How
should I do that? 

3. Am I doing the right thing broken SDRAM like that? 

Thanks,
Cristiano.

------------------------------------------------------------
Cristiano Ligieri Pereira - http://www.ics.uci.edu/~cpereira