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Re: DAI driver and I2S interrupt on edb7xxx


Franck MAMALET FT-R&D DIH/OCF wrote:
> I think it is not a good idea for a FIQ, and actually it doesn't work.  I
> had to change hal_interrupt_status_regmap table to fix it:
> 
> "./arm/edb7xxx/current/src/edb7xxx_misc.c"  line 284
> static struct regmap {
>     int        first_int, last_int;
>     cyg_uint32 stat_reg, mask_reg;
> } hal_interrupt_status_regmap[] = {
>     { CYGNUM_HAL_INTERRUPT_EXTFIQ, CYGNUM_HAL_INTERRUPT_MCINT,  INTSR1,
> INTMR1},
> #if defined(__EDB7211)
>     { CYGNUM_HAL_INTERRUPT_MCPINT, CYGNUM_HAL_INTERRUPT_MCPINT,  INTSR3,
> INTMR3},
> #endif
> #if defined(__EDB7209)
>     { CYGNUM_HAL_INTERRUPT_I2SINT, CYGNUM_HAL_INTERRUPT_I2SINT,  INTSR3,
> INTMR3},
> #endif
>    { CYGNUM_HAL_INTERRUPT_CSINT, CYGNUM_HAL_INTERRUPT_SSEOTI,  INTSR1,
> INTMR1},
>     { CYGNUM_HAL_INTERRUPT_KBDINT, CYGNUM_HAL_INTERRUPT_URXINT2, INTSR2,
> INTMR2},
>     { 0, 0, 0}
> };

Looks fine to me. I'll make that change here too.

> Could you please tell me if  my modification is OK (I mean safe) ? and if
> the same kind of selection is applied for DSR handling? and where?

DSRs are not prioritized in that way. The system can't continue till all
DSRs are run anyway.

Jifl
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