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RE: Enable EDB7xxx interrupts


> > > >I tested the lines with a multi tester.  All the relevant lines
> > >
> > > You might not see a pulse on that though.
> >
> >I never clear the interrupts so I should see it shouldn't I?
> 
> Not necessarily (remember that I haven't read the datasheet 
> for the 6700 
> though). The INTSR regs inside the 7312 will hold their request state 
> regardless of the physical pin state. The PS6700 might be 
> issuing a pulsed 
> interrupt request. That will latch a request into INTSRx and 
> whisk the CPU 
> into an IRQ or FIQ state, but it won't leave any state on the 
> interrupt 
> line itself.

I did test the EINT1 interrupt on the CPU as you suggested with the
multi tester by pulling it low, and fired just fine.

> Pop a DSO on the actual pin of the PS6700 (if you have one) 
> and capture the 
> timeframe surrounding your interrupt event...

What's a DSO?  Do you mean a logic analyzer?

> One issue that bit me fair on the rump with the EDB7209 
> (actually 7212) is 
> that a jumper needs to be moved and/or a resistor clipped in 
> order to get 
> interrupts working on the Ethernet controller. There could well be 
> something similar on your EDB. Check the schematic and see 
> where those 
> interrupt lines run. I think in the case of the EDB7212 (I'm 
> not looking at 
> the schematic now... my mind is full of SA1110 PCMCIA 
> problems and I don't 
> want to confuse myself!) the same interrupt request line is 
> shared between 
> ethernet and parallel port and the default factory setup 
> routes the CPU's 
> interrupt line to the parallel port, so no Ethernet interrupts ever.

Yep, already did that, a jumper is required for the FIQ, but not the IRQ
line.  The FIQ jumper has been on the entire time however.


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