[ECOS] new edb7xxx_misc.c for PCMCIA support

["Trenton D. Adams" <tadams at extremeeng dot com>]

I changed the following in
"hal\arm\edb7xxx\current\include\hal_platform_ints.h"

#if defined(__EDB7211)
    #define CYGNUM_HAL_INTERRUPT_MCPINT         22
    #define CYGNUM_HAL_INTERRUPT_PCMCIA1_IRQ    23
    #define CYGNUM_HAL_INTERRUPT_PCMCIA1_FIQ    24
#endif

Below I have posted the changes I've made to the
"hal\arm\edb7xxx\current\src\edb7xxx_misc.c" file.  


The interrupt arrays below are a little bit convoluted, but I think they
are right.  I added the CYGNUM_HAL_INTERRUPT_PCMCIA1_XXX sections.

static cyg_uint32 hal_interrupt_bitmap[] = {
    0,              // CYGNUM_HAL_INTERRUPT_unused     0
    INTSR1_EXTFIQ,  // CYGNUM_HAL_INTERRUPT_EXTFIQ     1
    INTSR1_BLINT,   // CYGNUM_HAL_INTERRUPT_BLINT      2
    INTSR1_WEINT,   // CYGNUM_HAL_INTERRUPT_WEINT      3
    INTSR1_MCINT,   // CYGNUM_HAL_INTERRUPT_MCINT      4
    INTSR1_CSINT,   // CYGNUM_HAL_INTERRUPT_CSINT      5
    INTSR1_EINT1,   // CYGNUM_HAL_INTERRUPT_EINT1      6    
    INTSR1_EINT2,   // CYGNUM_HAL_INTERRUPT_EINT2      7
    INTSR1_EINT3,   // CYGNUM_HAL_INTERRUPT_EINT3      8
    INTSR1_TC1OI,   // CYGNUM_HAL_INTERRUPT_TC1OI      9
    INTSR1_TC2OI,   // CYGNUM_HAL_INTERRUPT_TC2OI      10
    INTSR1_RTCMI,   // CYGNUM_HAL_INTERRUPT_RTCMI      11
    INTSR1_TINT,    // CYGNUM_HAL_INTERRUPT_TINT       12
    INTSR1_UTXINT1, // CYGNUM_HAL_INTERRUPT_UTXINT1    13
    INTSR1_URXINT1, // CYGNUM_HAL_INTERRUPT_URXINT1    14
    INTSR1_UMSINT,  // CYGNUM_HAL_INTERRUPT_UMSINT     15
    INTSR1_SSEOTI,  // CYGNUM_HAL_INTERRUPT_SSEOTI     16
    INTSR2_KBDINT,  // CYGNUM_HAL_INTERRUPT_KBDINT     17
    INTSR2_SS2RX,   // CYGNUM_HAL_INTERRUPT_SS2RX      18
    INTSR2_SS2TX,   // CYGNUM_HAL_INTERRUPT_SS2TX      19
    INTSR2_UTXINT2, // CYGNUM_HAL_INTERRUPT_UTXINT2    20
    INTSR2_URXINT2, // CYGNUM_HAL_INTERRUPT_URXINT2    21
#if defined(__EDB7211)
    INTSR3_MCPINT,  // CYGNUM_HAL_INTERRUPT_MCPINT     22
    INTSR1_EINT1,   // CYGNUM_HAL_INTERRUPT_PCMCIA1_IRQ 23
    INTSR1_EXTFIQ   // CYGNUM_HAL_INTERRUPT_PCMCIA1_FIQ 24
#endif
#if defined(__EDB7209)
    INTSR3_I2SINT   // CYGNUM_HAL_INTERRUPT_I2SINT     22
#endif
};

static cyg_uint32 hal_interrupt_mask_regmap[] = {
    0,      // CYGNUM_HAL_INTERRUPT_unused     0
    INTMR1, // CYGNUM_HAL_INTERRUPT_EXTFIQ     1
    INTMR1, // CYGNUM_HAL_INTERRUPT_BLINT      2
    INTMR1, // CYGNUM_HAL_INTERRUPT_WEINT      3
    INTMR1, // CYGNUM_HAL_INTERRUPT_MCINT      4
    INTMR1, // CYGNUM_HAL_INTERRUPT_CSINT      5
    INTMR1, // CYGNUM_HAL_INTERRUPT_EINT1      6    
    INTMR1, // CYGNUM_HAL_INTERRUPT_EINT2      7
    INTMR1, // CYGNUM_HAL_INTERRUPT_EINT3      8
    INTMR1, // CYGNUM_HAL_INTERRUPT_TC1OI      9
    INTMR1, // CYGNUM_HAL_INTERRUPT_TC2OI      10
    INTMR1, // CYGNUM_HAL_INTERRUPT_RTCMI      11
    INTMR1, // CYGNUM_HAL_INTERRUPT_TINT       12
    INTMR1, // CYGNUM_HAL_INTERRUPT_UTXINT1    13
    INTMR1, // CYGNUM_HAL_INTERRUPT_URXINT1    14
    INTMR1, // CYGNUM_HAL_INTERRUPT_UMSINT     15
    INTMR1, // CYGNUM_HAL_INTERRUPT_SSEOTI     16
    INTMR2, // CYGNUM_HAL_INTERRUPT_KBDINT     17
    INTMR2, // CYGNUM_HAL_INTERRUPT_SS2RX      18
    INTMR2, // CYGNUM_HAL_INTERRUPT_SS2TX      19
    INTMR2, // CYGNUM_HAL_INTERRUPT_UTXINT2    20
    INTMR2, // CYGNUM_HAL_INTERRUPT_URXINT2    21
#if defined(__EDB7211)
    INTMR3, // CYGNUM_HAL_INTERRUPT_MCPINT     22
    INTMR1, // CYGNUM_HAL_INTERRUPT_PCMCIA1_IRQ 23
    INTMR1, // CYGNUM_HAL_INTERRUPT_PCMCIA1_FIQ 24
#endif
#if defined(__EDB7209)
    INTMR3, // CYGNUM_HAL_INTERRUPT_I2SINT     22
#endif
};

static cyg_uint32 hal_interrupt_clear_map[] = {
    0,      // CYGNUM_HAL_INTERRUPT_unused     0
    0,      // CYGNUM_HAL_INTERRUPT_EXTFIQ     1
    BLEOI,  // CYGNUM_HAL_INTERRUPT_BLINT      2
    TEOI,   // CYGNUM_HAL_INTERRUPT_WEINT      3
    MCEOI,  // CYGNUM_HAL_INTERRUPT_MCINT      4
    COEOI,  // CYGNUM_HAL_INTERRUPT_CSINT      5
    0,      // CYGNUM_HAL_INTERRUPT_EINT1      6    
    0,      // CYGNUM_HAL_INTERRUPT_EINT2      7
    0,      // CYGNUM_HAL_INTERRUPT_EINT3      8
    TC1EOI, // CYGNUM_HAL_INTERRUPT_TC1OI      9
    TC2EOI, // CYGNUM_HAL_INTERRUPT_TC2OI      10
    RTCEOI, // CYGNUM_HAL_INTERRUPT_RTCMI      11
    TEOI,   // CYGNUM_HAL_INTERRUPT_TINT       12
    0,      // CYGNUM_HAL_INTERRUPT_UTXINT1    13
    0,      // CYGNUM_HAL_INTERRUPT_URXINT1    14
    UMSEOI, // CYGNUM_HAL_INTERRUPT_UMSINT     15
    0,      // CYGNUM_HAL_INTERRUPT_SSEOTI     16
    KBDEOI, // CYGNUM_HAL_INTERRUPT_KBDINT     17
    0,      // CYGNUM_HAL_INTERRUPT_SS2RX      18
    0,      // CYGNUM_HAL_INTERRUPT_SS2TX      19
    0,      // CYGNUM_HAL_INTERRUPT_UTXINT2    20
    0,      // CYGNUM_HAL_INTERRUPT_URXINT2    21
#if defined(__EDB7211)
    0,      // CYGNUM_HAL_INTERRUPT_MCPINT     22
    0,      // CYGNUM_HAL_INTERRUPT_PCMCIA1_IRQ 23
    0,      // CYGNUM_HAL_INTERRUPT_PCMCIA1_FIQ 24
#endif
#if defined(__EDB7209)
    0,      // CYGNUM_HAL_INTERRUPT_I2SINT     22
#endif
};

static struct regmap {
    int        first_int, last_int;
    cyg_uint32 stat_reg, mask_reg;
} hal_interrupt_status_regmap[] = {
    { CYGNUM_HAL_INTERRUPT_EXTFIQ, CYGNUM_HAL_INTERRUPT_SSEOTI,  INTSR1,
INTMR1},
    { CYGNUM_HAL_INTERRUPT_KBDINT, CYGNUM_HAL_INTERRUPT_URXINT2, INTSR2,
INTMR2},
#if defined(__EDB7211)
    { CYGNUM_HAL_INTERRUPT_MCPINT, CYGNUM_HAL_INTERRUPT_MCPINT,  INTSR3,
INTMR3},
    { CYGNUM_HAL_INTERRUPT_PCMCIA1_IRQ, CYGNUM_HAL_INTERRUPT_PCMCIA_FIQ,
INTSR1, INTMR1},
#endif
#if defined(__EDB7209)
    { CYGNUM_HAL_INTERRUPT_I2SINT, CYGNUM_HAL_INTERRUPT_I2SINT,  INTSR3,
INTMR3},
#endif
    { 0, 0, 0}
};


Now we have the hal_IRQ_handler ().  I think I'm done for modifications
to the HAL, no?  I'm not sure how the rest of the HAL works with this
function, or the arrays above so I'm not really sure if I'm done or not.
If this will work, then fine.  But would it be better to put the
handling of all the CL-PS6700 controller's interrupts in this
hal_IRQ_handler ()?  Then the PCMCIA driver would just hook those
interrupts as necessary by calling the cyg_drv_interrupt_* () functions,
right?

int hal_IRQ_handler(void)
{
    struct regmap *map = hal_interrupt_status_regmap;
    cyg_uint32 stat;
    int vector;
#ifdef __EDB7211
    cyg_uint16 pc_stat,
        pc_mask;
#endif

    // end of hal_interrupt_status_regmap array?
    while (map->first_int)
    {
        // Which interrupts are enabled and active
        stat = *(volatile cyg_uint32 *)map->stat_reg & 
            *(volatile cyg_uint32 *)map->mask_reg;  

        // Find the active one and return it
        for (vector = map->first_int; vector <= map->last_int; vector++)

        {
            if (stat & hal_interrupt_bitmap[vector])
            {
#ifdef __EDB7211
                pc_stat = (unsigned short)*(unsigned *)PCISR;
                pc_mask = (unsigned short)*(unsigned *)PCISR;
                if (pc_stat & pc_mask)  // There is a PC Card interrupt
                    return vector;  // let the PCMCIA driver handle the
rest
#else
                return vector;
#endif
            }
        }
        map++;  // Next interrupt status register
    }
    hal_spurious_ints++;
    return CYGNUM_HAL_INTERRUPT_NONE; // This shouldn't happen!
}