[ECOS] MBX860, adding some IO-device

[Daniel Lind <daniel dot lind at sth dot frontec dot se>]

Hi,
I'm using a MBX860 board that is an standardlevel board. I have found
out that the port for the MBX board must be for the entry-level board.
The entry level board doesn't contain the super I/O chip, called 37C672.
To reach this chip you must first use to other chips QSPAN and WINBOND.
However, the first thing I must be able to do is to write and read to
the registers in QSPAN. This chip is connected to the MBX board through
one of the memory-banks. Right now I can't reach them and the debugger
tells me that there is a segmentation fault if I try to read these
registers. I have found out that I must add some functionality so I can
reach the memory bank, but I dont know how to add the functionality.

One suggestion from the mailing list is that it's a MMU problem and that
I should look up the function
packages/hal/powerpc/mbx/current/src/hal_aux.c. In this file a memory
map is defined...

// The memory map is weakly defined, allowing the application to
redefine
// it if necessary. The regions defined below are the minimum
requirements.
CYGARC_MEMDESC_TABLE CYGBLD_ATTRIB_WEAK = {
    // Mapping for the Motorola MBX860 development board
    CYGARC_MEMDESC_CACHE(   0xfe000000, 0x00400000 ), // ROM region
    CYGARC_MEMDESC_NOCACHE( 0xff000000, 0x00100000 ), // MCP registers
    CYGARC_MEMDESC_NOCACHE( 0xfa100000, 0x00000004 ), //
Control/Status+LEDs
    CYGARC_MEMDESC_CACHE(   0x00000000, 0x00800000 ), // Main memory

 //*******Extra mapping for MBX860-starterkit ******************
 CYGARC_MEMDESC_NOCACHE( 0x80000000, 0x1FFFFFFF ), // PCI/ISA I/O SPACE

 CYGARC_MEMDESC_NOCACHE( 0xFA210001, 0x0000FFFE ),
 // PCI bus bridge control / status registers

 //see the MBX programmers manual
 //*************************************************************

    CYGARC_MEMDESC_TABLE_END
};

For the first thing I don't realy understand the definition of
CYGARC_MEMDESC_NOCACHE in the file
hel_mem.h

#define CYGARC_MEMDESC_NOCACHE( _va_, _sz_ ) \
        { (_va_), (_va_), (_sz_), CYGARC_MEMDESC_CI }

What is _va_ and _sz_, I have never before seen these kind of macros I
would like to know more about them. What to they do?

So, I Just as a test  tried to add a definition for the memory region of
the qspan registers, ie PCI bus bridge control / status registers. When
I try to read from these registers my debugger (insight) crashes....Must
I build a new stub? Is the problem that my debugger can't se what these
registers contain? I use an stub that I built before I did these
changes.

/Daniel Lind