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I use a bog-standard gcc 4.1.0 to cross-compile all my ARM kernels with, which allows me to build both old-ABI and EABI kernels. (These days I build all kernels in EABI mode with old-ABI compat.)
With old-ABI compat enabled, you lose the speed advantage that the system call change was designed to achieve: it still has to inspect the instruction stream to see whether each system call is a new-ABI (SWI 0, syscall number in r7) or old-abi (SWI 0x900000+n) one, and peeking the SWI instruction to figure out which convention was used accesses the code segment thorough the data cache, causing a cache flush.
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