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ARM requires aligned rd/wr operations, otherwise it is by design: "UNPREDICTABLE" For ARM it is IMPLIMENTATION DEFINED if it faults on alignment errors. (Meaning: Core XYZ might, but - core ABC does not) you must read the TRM for the specific core you are using, ie: 946, 926, 7TDMI, etc. I believe the cores with ARM MMUs fault, but other do not. Other CPUs - for example motorola 68k based to generate a bus fault. Depends on the chip. The X86 processors carry baggage from the original 8086 - which supported unaligned access. You should have (or get) a copy of the ARM ARM book. Amazon sells it: ARM Architecture Reference Manual (2nd Edition) aka: ARM_ARM by David Seal ISBN: 0201737191 Publisher: Addison Wesley http://www.arm.com/documentation/books.html says: "Also availabe in PDF form on the ARM Technical Publications CD" It's 811 pages long, buy the physical book. See: ARM ARM book - Section 2.1 Data Types page A2-2 ARM Document: ARM DDI-0100E Also: ARM ARM book - Section 2.7.1 Address Space Page A2-22 And - more specifically: ARM ARM Book Section 2.7.3 Unaligned Memory Access Page A2-26 -Duane. ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sources.redhat.com
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