Coldfire/M68K 32 bit RAM access?

[Alan Cudmore <Alan dot P dot Cudmore at nasa dot gov>]

I'm working on a custom embedded Coldfire processor board that has 512K of 
SRAM on it.
This SRAM only allows 32 bit reads and writes, and the lower two address 
bits do not connect to the coldfire.
There is nothing on the board to try to compensate for this either. I had 
worked with other boards that had an EDAC that would do a read-modify-write 
operation for 8 or 16 bit operations.

Am I correct in thinking that GCC compiled code will not run on this?

I see immediate problems when I move the stack from internal ( on chip ) 
SRAM to this on-board SRAM.

I tried the -malign-int option and that seems to help with the stack 
alignment, but I cant see how I could constrain GCC to never do anything 
other than 32 bit word accesses?
Does this sound right?

Thanks,
Alan Cudmore


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