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Re: Section layout with ld script for flash based ARM system : what'swrong?


Vincent:


Among other things, "Relocation truncated to fit" means that the linker tried to generate a reference to something in a short B or BL instruction, and couldn't fit it into the 24 bits (IIRC) available in that opcode. In other words, the reference destination is too far away from the reference to represent.


Check out gcc's -mlong-calls switch.

Also, you may want to give gdb's ARM instruction set simulator a try. Could be quicker than crashing and burning on real hardware. :^)


b.g.


--
Bill Gatliff
Embedded GNU and Linux development, training
bgat@billgatliff.com



Vincent Rubiolo wrote:

Hi,

Does somebody could give me some advice to organize memory sections with an ld
script for a flash/RAM based system?


Everything is dled in flash at startup. ASM routines take care of copying RAM
functions from flash to RAM and zero-ing .bss sections.


The problems is that we want to include code of certain objects files in the RAM
zone so we have to declare them first. Otherwise, the * takes precedence and
they are wrongly located.


The problem that arises is that I have lots of "Relocation truncated to fit"
errors and I do not understand why.


As it is in fact ADS->GNU conversion, I wonder about how to convert the ARE
statement. Suppose we have the [AREA BOOT, CODE] statement to translate.
Should I replace it with a [.section "BOOT", "x"] or with [.section "BOOT"\n .text].
I chose the second solution. If I switch to the first one, then I have "Literal
referenced across section boundary" error (If I remember well)



Could somebody help?


Thanks a lot for your reply.

Vincent

*********************************************************************************
Here is my script (which is a translation of ADS scatter file btw)
*********************************************************************************

SECTIONS {

/* Code in Internal Ram has to be relocated at address 0x000000 but must be placed after .text section in ROM */
.iram_text 0x00000000 : AT (0x01000080 + SIZEOF(.text))
{
Load$$IRAM$$Base = 0x00000000 ; /* Load address of the region */
Image$$IRAM$$Base = . ; /* Execution address of the region */


        *except.o (.text .rodata)
        *irqisr.o (.text .rodata)
        *irqctrl.o (.text .rodata)
        *HW_BT_iip.o (.text .rodata)
        *os_context_arm.o (.text .rodata)
        *os_int_prim.o (.text .rodata)
        *nvdslowlevel.o (.text .rodata)
        */uart2.o (.text .rodata)
        */usb.o (.text .rodata)
        *USB_int.o (.text .rodata)
        *sleepfromram.o (.text .rodata)

        Image$$IRAM$$Length    = . - Image$$IRAM$$Base ;
        Iram_Text_End        = .            ;
    }

/* We relocate Internal RAM data after RAM code but put it in ROM, after Internal RAM code */
.data 0x00000000 + SIZEOF(.iram_text) : AT (Iram_Text_End)
{


Image$$IRAMDATA$$Base = . ;
Load$$IRAMDATA$$Base = 0x00000000 + SIZEOF(.iram_text) ;



*lm_memory_manager.o (.data)
*.o (.data)
Iram_Data_End = . ;
Image$$IRAMDATA$$Length = . - Image$$IRAMDATA$$Base ;


}
/* Same stuff for BSS */
.bss 0x00000000 + SIZEOF(.iram_text) + SIZEOF(.data) : AT (Iram_Data_End)
{
Image$$IRAMDATA$$ZI$$Base = . ;
*lm_memory_manager.o (.bss)
*.o (.bss)
Iram_Bss_End = . ;
Image$$IRAMDATA$$ZI$$Length = Iram_Bss_End - Image$$IRAMDATA$$ZI$$Base ;


}

end = . ;

/* GNU : The entry point of our application. This label is located in boot.o */
ENTRY(entry_point)


/* Code section at the beginnign of the ROM
.text 0x01000080 :
{
*/boot.o (.text .rodata) /* Make sure the code for booting is first */
*.o (.text .rodata)
Code_End = . ;
} > CODE


}


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