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The problem seems to be related to the external hardware that I have connected to it (a couple of Xilinx FPGAs). My program was a glorified memory tester, so I changed the address range to the on board dram and it worked fine. The 68306 has a built in dram controller so no external address decoding was required, when interfacing to the FPGAs which use the lower 24 bits for decoding (the rest is controlled by chip select), somehow that causes it to generate spurious errors. But thanks for your help, definitely helped me eliminate some of my problems. Noah Aklilu MSc Graduate Student Dept of Electrical and Computer Engineering ------ Want more information? See the CrossGCC FAQ, http://www.objsw.com/CrossGCC/ Want to unsubscribe? Send a note to crossgcc-unsubscribe@sourceware.cygnus.com
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