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sid, base_insn vs entire_insn and ambiguity
- From: Aurélien Buhrig <aurelien dot buhrig at tiempo-ic dot com>
- To: <cgen at sourceware dot org>
- Date: Mon, 23 Jun 2008 13:08:08 +0200
- Subject: sid, base_insn vs entire_insn and ambiguity
Hello,
I try to port sid simulator for a new 16bit target. This processor have
multiple word insn. (1 or 2 if there is an immediate value). So insn can
take 16 or 32 bits.
So I have the same problem that the one reported here :
http://sourceware.org/ml/cgen/2006-q3/msg00030.html
Since I do not want to do ?some ugly code which examines the base_insn bits
in order to decide how to position entire_insn?, and since it seems there is
no new way to have the insn length before decoding the instruction, I tried
the second solution that consists in setting the base-insn-bitsize to 32.
I have now 2 problems :
- The disassembly is not correct anymore.
- I have an unresolved ambiguity error.
ERROR: Unable to resolve ambiguity (maybe need some ifield-assertion specs?)
So I tried derived operand with ifield-assertion, the I cannot fix the
ambiguity problem.
Here is the description of the faulty insn:
(define-derived-operand
(name unop-pi-pc-imm52)
(comment "")
(attrs)
(mode UHI)
(args (uimm52) (reg))
(syntax "$uimm52")
(base-ifield f-1opopc)
(encoding (+ UNAD_PI REG_PC uimm52 ) )
(ifield-assertion (eq f-reg 7))
(getter (nop))
(setter (nop)))
(define-derived-operand
(name unop-pi-gr)
(comment "")
(attrs)
(mode UHI)
(args (reg))
(syntax "$(reg)+")
(base-ifield f-1opopc)
(encoding (+ UNAD_PI reg ) )
(ifield-assertion (not (eq f-reg 7)))
(getter (nop))
(setter (nop)))
(define-anyof-operand
(name unop-pi)
(comment "PI addressing modes")
(mode UHI)
(base-ifield f-1opopc)
(choices unop-pi-pc-imm52 unop-pi-gr))
(dni
moveps ; name
(.str mnemonic " (rn)+") ; comment
() ; attrs
("move.$len $sr,($reg)+") ;
syntax
;+ (+ len SEL_1OP ONEOP_MTSR UNAD_PI reg) ; format
(+ len SEL_1OP ONEOP_MTSR unop-pi) ; format
(nop)
())
How can I do ?
Thanks,
Aurelien