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Re: [RFA:] Fix breakage of manually building SID CPU
- From: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>
- To: brolley at redhat dot com
- Cc: hans-peter dot nilsson at axis dot com, cgen at sourceware dot org
- Date: Wed, 15 Mar 2006 20:23:14 +0100
- Subject: Re: [RFA:] Fix breakage of manually building SID CPU
> Date: Wed, 15 Mar 2006 12:07:57 -0500
> From: Dave Brolley <brolley@redhat.com>
> >So, uh, why would only parallel CPUs have delay-slots? Or do we
> >actually have differing perceptions and definitions of what a
> >"delay" is?
> >
> It's more of an extension of the notion of what parallel is. The "new"
> delay implementation (SID only) thinks of a delay as something to be
> done later, in parallel with something else.
But it's not. A delayed branch doesn't (necessarily or usually)
run in parallel with the delayed instruction or the one after
the delayed one.
brgds, H-P