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Re: [RFA:] Fix breakage of manually building SID CPU
- From: Doug Evans <dje at transmeta dot com>
- To: Dave Brolley <brolley at redhat dot com>
- Cc: Hans-Peter Nilsson <hans-peter dot nilsson at axis dot com>, cgen at sourceware dot org
- Date: Wed, 15 Mar 2006 09:14:47 -0800 (PST)
- Subject: Re: [RFA:] Fix breakage of manually building SID CPU
- References: <200603150124.k2F1O5Rk014471@ignucius.se.axis.com> <441849ED.1030503@redhat.com>
Dave Brolley writes:
> >So, uh, why would only parallel CPUs have delay-slots? Or do we
> >actually have differing perceptions and definitions of what a
> >"delay" is?
> >
> It's more of an extension of the notion of what parallel is.
What dictionary are you looking in? :-)
> The "new" delay implementation [...].
> [...]
> I think that if both can be supported then that would be "a good thing
> (tm)".
Both what? Maybe you can elaborate on why both are needed
at the rtl level? [I'm thinking in language terms, not implementation.]