This is the mail archive of the cgen@sources.redhat.com mailing list for the CGEN project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: include/dis-asm.h patch for cgen disassemblers



> I chose the PS2 because its architecture is public and, I think, it very much illustrates the underlying issue of the current discussion.
> 
> The PS2 has a number of ISAs on a single chip.  What is the correct way to define this from bfd?  If you don't feel comfortable with answering this, then hopefully someone else will.  Off the top of my head I can think of several ways:
> 
>     bfd_arch_mips
>         bfd_mach_mips_ps2mips
>         bfd_mach_mips_ps2video
> 
>     bfd_arch_ps2
>         bfd_mach_ps2mips
>         bfd_mach_ps2video
> 
>     bfd_arch_mips
>         bfd_mach_mips_ps2
>     bfd_arch_ps2video
> 
> I think BFD to clearly document how this should be done, your isas is very much part of this. 


Sorry, you did answer this.

 >> We did whatever must have seemed most useful at the time for their
 >> treatment ... one bfd_arch, a bunch of bfd_mach's.  Note that all
 >> those coprocessors have a static set of instructions.

that would be #2 above.  The question is then, is this the most 
applicable model and acceptable to BFD/BINUTILS?

It definitly means a sideways twist since ps2mips is a member of the 
bfd_arch_mips family.

Andrew


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]