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include/dis-asm.h patch for cgen disassemblers


Hi -

I have a scenario where I need a (cgen-based) disassembler to select
a given list of instruction sets of a multi-ISA processor, based on
a run-time condition.  This is something like the arm/thumb or
mips/mips16 split (odd PC), except that there is no trivial way to
encode the run-time condition.  The raw arch/mach parameters are
fixed, and there is no object file for the disassembler to look
into to guess from (based on PC).  So, I can either expand the
disassemble_info structure, or overload an existing field.  

I went with the latter for this patch.  It adds a new .flags option,
which tells cgen-based disassemblers to pull out the ISA bitmask out
of the .mach field.  This is no great loss, since the mach field is
not normally used for such purposes in cgen ports, and can be
overridden on a per-target basis for exceptions.

Any comments / objections?

- FChE


Index: opcodes/ChangeLog
===================================================================
@@ -1,3 +1,8 @@
+2002-01-25  Frank Ch. Eigler  <fche@redhat.com>
+
+	* cgen-dis.in (print_insn_@arch@): Support HAVE_CGEN_ISA_NOT_MACH
+	disassemble_info flag.
+

Index: opcodes/cgen-dis.in
===================================================================
@@ -380,13 +380,19 @@
 #ifdef CGEN_COMPUTE_MACH
   mach = CGEN_COMPUTE_MACH (info);
 #else
-  mach = info->mach;
+  if (info->flags & HAVE_CGEN_ISA_NOT_MACH)
+    mach = 0;
+  else
+    mach = info->mach;
 #endif
 
 #ifdef CGEN_COMPUTE_ISA
   isa = CGEN_COMPUTE_ISA (info);
 #else
-  isa = 0;
+  if (info->flags & HAVE_CGEN_ISA_NOT_MACH)
+    isa = info->mach;
+  else
+    isa = 0;
 #endif
 
   /* If we've switched cpu's, close the current table and open a new one.  */

Index: include/ChangeLog
===================================================================
@@ -1,3 +1,8 @@
+2002-01-25  Frank Ch. Eigler  <fche@redhat.com>
+
+	* dis-asm.h (HAVE_CGEN_ISA_NOT_MACH): New possible bitmask for
+	disassemble_info flags.
+

Index: include/dis-asm.h
===================================================================
@@ -93,6 +93,7 @@
      The bottom 16 bits are for the internal use of the disassembler.  */
   unsigned long flags;
 #define INSN_HAS_RELOC	0x80000000
+#define HAVE_CGEN_ISA_NOT_MACH 0x40000000 /* .mach is really a cgen isa bitmask.  */
   PTR private_data;
 
   /* Function used to get bytes to disassemble.  MEMADDR is the




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