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cgen/gas: some support for funny-endian instruction sets
- To: "Frank Ch. Eigler" <fche at redhat dot com>
- Subject: cgen/gas: some support for funny-endian instruction sets
- From: Doug Evans <dje at transmeta dot com>
- Date: Mon, 9 Jul 2001 09:12:04 -0700 (PDT)
- Cc: cgen at sources dot redhat dot com, binutils at sources dot redhat dot com
- References: <20010709114618.A27320@redhat.com>
Frank Ch. Eigler writes:
> The patch below gives an interpretation to the hitherto-unused
> cgen "word-bitsize" CPU parameter. It is interpreted to mean
> the chunking size for endianness conversions when processing
> long instructions.
This isn't the definition of "word-bitsize" that a gcc hacker
would expect. I think a lot of other people would also find this confusing.
What's "word-bitsize" on sparc64? If it's not 64, you've got problems.
Setting aside the naming problem,
> When this parameter is set smaller than
> "base-insn-size" or happens to be smaller than the length of an
> instruction, then the instruction bytes are chunked into
> "word-bitsize" units, and individually endianness-converted.
As I'm sure you know, you can't uniformly chunk up an insn
in the general case.
What problem are you trying to solve?