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insn decoding with msb0
- To: cgen at sources dot redhat dot com
- Subject: insn decoding with msb0
- From: Johan Rydberg <johan dot rydberg at netinsight dot se>
- Date: Sun, 14 Jan 2001 21:49:35 +0100
- Organization: Net Insight AB
Hi!
I have run into some problem with insn decoding when the CPU has
msb as bit 0 (i.e., the PowerPC CPU).
To make it a bit easier to debug, I switched back to using the
'decode-assist' statement when defining the ISA:
(decode-assist (0 1 2 3 4 5))
Looking at the generated code you see that it shifts with 25 when
it really should shift with 26. This seems to be the case with
all shifts (I have manualy changed the shift amount and verified
that it works).
unsigned int val = (((insn >> 25) & (63 << 0)));
switch (val)
{
...
This seems to be the case when not using the decode-assist statement
aswell.
The following small patch fixes the problem for me (both using the
decode-assist statement and not), but I guess that it's not correct
for other ports (m32r, ...)
diff -u -r1.5 utils-sim.scm
--- utils-sim.scm 2000/12/04 18:34:45 1.5
+++ utils-sim.scm 2001/01/14 20:37:40
@@ -546,7 +546,7 @@
; FIXME: Need to handle left (-ve) shift.
(shift (- (if lsb0?
(- first bits -1)
- (- (+ start size) (+ first bits)))
+ (- (+ start size 1) (+ first bits)))
pos)))
(string-append
" | ((" val " >> " (number->string shift)
Regards,
Johan.