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[PATCH] ix86/Intel: don't require memory operand size specifier for PTWRITE
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: <binutils at sourceware dot org>
- Cc: "H.J. Lu" <hjl dot tools at gmail dot com>
- Date: Wed, 15 Nov 2017 06:16:52 -0700
- Subject: [PATCH] ix86/Intel: don't require memory operand size specifier for PTWRITE
- Authentication-results: sourceware.org; auth=none
Other than in 64-bit mode, in 32- and 16-bit modes operand size isn't
ambiguous.
gas/
2017-11-15 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (process_suffix): Ignore .no_qsuf outside of
64-bit mode.
* testsuite/gas/i386/ptwrite.s: Add test for memory operand
without DWORD PTR.
* testsuite/gas/i386/ptwrite.d,
testsuite/gas/i386/ptwrite-intel.d: Adjust expectations.
--- 2017-11-10/gas/config/tc-i386.c
+++ 2017-11-10/gas/config/tc-i386.c
@@ -5564,7 +5564,7 @@ process_suffix (void)
suffixes |= 1 << 3;
if (!i.tm.opcode_modifier.no_ssuf)
suffixes |= 1 << 4;
- if (!i.tm.opcode_modifier.no_qsuf)
+ if (flag_code == CODE_64BIT && !i.tm.opcode_modifier.no_qsuf)
suffixes |= 1 << 5;
/* There are more than suffix matches. */
--- 2017-11-10/gas/testsuite/gas/i386/ptwrite-intel.d
+++ 2017-11-10/gas/testsuite/gas/i386/ptwrite-intel.d
@@ -15,4 +15,5 @@ Disassembly of section \.text:
+[a-f0-9]+: f3 0f ae 21 ptwrite DWORD PTR \[ecx\]
+[a-f0-9]+: f3 0f ae e1 ptwrite ecx
+[a-f0-9]+: f3 0f ae 21 ptwrite DWORD PTR \[ecx\]
+ +[a-f0-9]+: f3 0f ae 21 ptwrite DWORD PTR \[ecx\]
#pass
--- 2017-11-10/gas/testsuite/gas/i386/ptwrite.d
+++ 2017-11-10/gas/testsuite/gas/i386/ptwrite.d
@@ -15,4 +15,5 @@ Disassembly of section \.text:
+[a-f0-9]+: f3 0f ae 21 ptwritel \(%ecx\)
+[a-f0-9]+: f3 0f ae e1 ptwrite %ecx
+[a-f0-9]+: f3 0f ae 21 ptwritel \(%ecx\)
+ +[a-f0-9]+: f3 0f ae 21 ptwritel \(%ecx\)
#pass
--- 2017-11-10/gas/testsuite/gas/i386/ptwrite.s
+++ 2017-11-10/gas/testsuite/gas/i386/ptwrite.s
@@ -9,4 +9,5 @@ _start:
.intel_syntax noprefix
ptwrite ecx
+ ptwrite [ecx]
ptwrite DWORD PTR [ecx]