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[committed 1/2] MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculation


Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support") GAS 
bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which 
is not correctly calculated as `.set nomips16e2' and `.set nomt' 
pseudo-ops are processed.  This leads to code like:

$ cat foo.s
	.set	nomt
	evpe
	.align	4, 0
$ cat bar.s
	.set	nomips16e2
	dvpe
	.align	4, 0
$ 

to successfully assemble where it should not:

$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
$ objdump -m mips:16 -d foo.o

foo.o:     file format elf32-tradbigmips


Disassembly of section .text:

00000000 <.text>:
   0:	f027 6700 	evpe
	...

bar.o:     file format elf32-tradbigmips


Disassembly of section .text:

00000000 <.text>:
   0:	f026 6700 	dvpe
	...
$ 

This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never 
cleared.  Fix the problem by clearing it there before it is calculated 
based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as 
expected:

$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
foo.s: Assembler messages:
foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe'
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
bar.s: Assembler messages:
bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe'
$ 

	gas/
	* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT 
	flag before recalculating.
	* testsuite/gas/mips/mips16e2-mt-err.d: New test.
	* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
	* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new test.
---
binutils-mips16e2-gas-set-ase-mt-fix.diff
Index: binutils/gas/config/tc-mips.c
===================================================================
--- binutils.orig/gas/config/tc-mips.c	2017-06-28 14:54:53.269441714 +0100
+++ binutils/gas/config/tc-mips.c	2017-06-28 15:05:18.666544227 +0100
@@ -2130,6 +2130,11 @@ mips_set_ase (const struct mips_ase *ase
 
   mask = mips_ase_mask (ase->flags);
   opts->ase &= ~mask;
+
+  /* Clear combination ASE flags, which need to be recalculated based on
+     updated regular ASE settings.  */
+  opts->ase &= ~ASE_MIPS16E2_MT;
+
   if (enabled_p)
     opts->ase |= ase->flags;
 
Index: binutils/gas/testsuite/gas/mips/mips.exp
===================================================================
--- binutils.orig/gas/testsuite/gas/mips/mips.exp	2017-06-28 15:05:11.910185866 +0100
+++ binutils/gas/testsuite/gas/mips/mips.exp	2017-06-28 15:05:23.940841518 +0100
@@ -1403,6 +1403,7 @@ if { [istarget mips*-*-vxworks*] } {
 
     run_dump_test "mips16e-jrc"
     run_dump_test "mips16e2-lui"
+    run_dump_test "mips16e2-mt-err"
     run_dump_test "mips16e2-copy"
     run_dump_test "mips16e2-copy-err"
 
Index: binutils/gas/testsuite/gas/mips/mips16e2-mt-err.d
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils/gas/testsuite/gas/mips/mips16e2-mt-err.d	2017-06-28 15:05:23.955185310 +0100
@@ -0,0 +1,3 @@
+#name: MIPS16e2 MT ASE instruction errors
+#as: -32 -mips16 -mips32r2 -mmips16e2 -mmt
+#error-output: mips16e2-mt-err.l
Index: binutils/gas/testsuite/gas/mips/mips16e2-mt-err.l
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils/gas/testsuite/gas/mips/mips16e2-mt-err.l	2017-06-28 15:05:23.961399572 +0100
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*:8: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dvpe'
+.*:12: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dvpe'
Index: binutils/gas/testsuite/gas/mips/mips16e2-mt-err.s
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ binutils/gas/testsuite/gas/mips/mips16e2-mt-err.s	2017-06-28 15:05:23.975838889 +0100
@@ -0,0 +1,14 @@
+# Verify that switching off either `mips16e2' or `mt' causes an assembly
+# error with a MIPS16e2 MT ASE instruction, which requires both at a time.
+
+	.text
+foo:
+	evpe
+	.set	nomips16e2
+	dvpe
+	.set	mips16e2
+	evpe
+	.set	nomt
+	dvpe
+	.set	mt
+	evpe


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