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RE: [PATCH v2 1/2] [ARC] Fix handling of cpu=... disassembler option value

> On 6/20/17 5:32 AM, Pedro Alves wrote:
> > - I'm not sure on coding standard on the bfd side, but on the gdb side
> >   you'd write "disassembler_options_cmp (...) == 0" instead of
> >   !disassembler_options_cmp, since the return value isn't a boolean.
> It's the same on bfd side too, so "... == 0" is preferred.

Will fix that.

> > Both ARM and Power test these FOR_EACH_DISASSEMBLER_OPTION-
> related
> > paths using GDB's testsuite.  Grep for "set disassembler-options"
> > under gdb/testsuite/gdb.arch/.  But IIUC, ARC doesn't support "set
> > disassembler-options" yet, right?
> When I added the "set disassembler-options ..." support, I included support
> for it in PPC, ARM and S390.  ARC doesn't support it, but from a quick glance,
> it also doesn't look too hard to add.

I'll look into adding test case to binutils-objdump tests. GDB testsuite should
test only the GDB part of this option setting, I think.

As I've realized, this patch uncovers an issue with my previous GDB patch,
which added the usage of those disassembler option. That patch uses BFD machine
from XML target description as CPU model for disassembler option, but they are
not really the same. For modern ARCs BFD machine could be "ARCv2", "EM" or
"HS"; but CPU models are much more fine grained, as they distinguish various
configurations of ARC EM and ARC HS. While there is a cpu models "em" and "hs"
in ARC assembler, they are actually the least capable so they support the least
set of instructions for a given CPU model. Initially I wanted this "cpu="
disassembler option to select the BFD machine, so it would be directly mapped
to what comes from target description, but our binutils developer asked instead
to use actual CPU models there (since our assembler already had those CPU models
defined and it makes sense that assembler and disassembler options should
match), but I've missed that this also affects they GDB part as well.
Currently with case-insensitive option match disassembler would at least "EM"
and "HS" machines without a warning, achieving the main goal of those patches,
but with case-sensitive match I'd need an additional GDB patch Target
description doesn't really provide information about an exact cpu model for
ARC, so in GDB I need to pass to disassembler the most feature rich CPU model
for a specified BFD machine.


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