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Re: [PATCH] X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctly
>>> On 30.05.17 at 10:25, <bp@suse.de> wrote:
> On Tue, May 30, 2017 at 02:04:06AM -0600, Jan Beulich wrote:
>> Imo the "Flags Affected" section really should be making SAR the
>> exception rather than SHL and SHR.
>
> Do you mean this:
>
> "The SHR instruction clears the most significant bit (see Figure 7-8 in
> the Intel® 64 and IA-32 Architectures Software Developer’s Manual,
> Volume 1); the SAR instruction sets or clears the most significant bit
> to correspond to the sign (most significant bit) of the original value
> in the destination operand."
>
> ?
No, the section near the end of the pages, ahead of the exceptions:
"The CF flag contains the value of the last bit shifted out of the
destination operand; it is undefined for SHL and SHR instructions
where the count is greater than or equal to the size (in bits) of
the destination operand."
which I think should read
"The CF flag contains the value of the last bit shifted out of the
destination operand; for instructions other than SAR it is undefined
when the count is greater than or equal to the size (in bits) of
the destination operand."
Jan