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Re: [PATCH] X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctly
>>> On 30.05.17 at 00:35, <firstname.lastname@example.org> wrote:
> On Mon, May 29, 2017 at 2:57 PM, Borislav Petkov <email@example.com> wrote:
>> On Mon, May 29, 2017 at 02:52:32PM -0700, H.J. Lu wrote:
>>> On Mon, May 29, 2017 at 2:49 PM, Borislav Petkov <firstname.lastname@example.org> wrote:
>>> > On Mon, May 29, 2017 at 02:44:12PM -0700, H.J. Lu wrote:
>>> >> Can you write some tests to verify it?
>>> > Verify what exactly?
>>> It is SAL not SHL.
>> There's no difference between SAL and SHL as doing an arithmetic shift
>> left and a logical shift left is the same thing - in both cases the LSB
>> is filled with 0.
> From IA SDM:
> The CF flag contains the value of the last bit shifted out of the
> destination operand; it is undefined for SHL and SHR
> instructions where the count is greater than or equal to the size (in
> bits) of the destination operand. The OF flag is
> affected only for 1-bit shifts (see “Description” above); otherwise,
> it is undefined. The SF, ZF, and PF flags are set
> according to the result. If the count is 0, the flags are not
> affected. For a non-zero count, the AF flag is undefined.
How does this relate to whether to use SAL or SHL as mnemonic
here? After all, if there was a behavioral difference, surely the
specifications would explicitly list the /6 variant as SAL (and then
assembler side support would be needed too).
> What does AMD manual say?
Funny you ask this - why don't you simply read what it says?