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Re: RFC: [PATCH] X86: Add pseudo prefixes to control encoding

On 11/11/2016 09:48 PM, H.J. Lu wrote:
On Fri, Nov 11, 2016 at 12:42 PM, Florian Weimer <> wrote:
On 11/04/2016 07:24 PM, H.J. Lu wrote:

Many x86 instructions have more than one encodings.  Assembler picks
the default one, usually the shortest one.  Although the ".s", ".d8"
and ".d32" suffixes can be used to swap register operands or specify
displacement size, they aren't very flexible.  This patch adds pseudo
prefixes, {xxx}, to control instruction encoding.  The available
pseudo prefixes are {disp8}, {disp32}, {swap}, {vex2}, {vex3} and
{evex}.  Pseudo prefixes are preferred over the ".s", ".d8" and ".d32"
suffixes, which are deprecated.

For certain ways of writing jump tables, instruction length specifications
would be quite useful.  The assembler would be free to choose any encoding,
as long as it has the required instruction length.

Here's a bug which  was caused by optimizing

  mov 0(%esi,%ecx,4),%edx   to   mov (%esi,%ecx,4),%edx

This is done on purpose since "0" can be encoded as 0, 8 or 32-bit.
Now you can use {disp8}" or "{disp32}" to prefer either 8-bit or 32-bit.

Sure, but I think the instruction length specification would still be *very* useful in some cases to lock things down (and document the length dependency).


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