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Re: [AArch64][SVE 15/32] Add {insert,extract}_all_fields helpers
On 23/08/16 10:15, Richard Sandiford wrote:
> Several of the SVE operands use the aarch64_operand fields array
> to store the fields that make up the operand, rather than hard-coding
> the names in the C code. This patch adds helpers for inserting and
> extracting those fields.
>
> OK to install?
>
> Thanks,
> Richard
>
>
> opcodes/
> * aarch64-asm.c: Include libiberty.h.
> (insert_fields): New function.
> (aarch64_ins_imm): Use it.
> * aarch64-dis.c (extract_fields): New function.
> (aarch64_ext_imm): Use it.
>
OK.
R.
> diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
> index 8fbd66f..3b0a383 100644
> --- a/opcodes/aarch64-asm.c
> +++ b/opcodes/aarch64-asm.c
> @@ -20,6 +20,7 @@
>
> #include "sysdep.h"
> #include <stdarg.h>
> +#include "libiberty.h"
> #include "aarch64-asm.h"
>
> /* Utilities. */
> @@ -55,6 +56,25 @@ insert_fields (aarch64_insn *code, aarch64_insn value, aarch64_insn mask, ...)
> va_end (va);
> }
>
> +/* Insert a raw field value VALUE into all fields in SELF->fields.
> + The least significant bit goes in the final field. */
> +
> +static void
> +insert_all_fields (const aarch64_operand *self, aarch64_insn *code,
> + aarch64_insn value)
> +{
> + unsigned int i;
> + enum aarch64_field_kind kind;
> +
> + for (i = ARRAY_SIZE (self->fields); i-- > 0; )
> + if (self->fields[i] != FLD_NIL)
> + {
> + kind = self->fields[i];
> + insert_field (kind, code, value, 0);
> + value >>= fields[kind].width;
> + }
> +}
> +
> /* Operand inserters. */
>
> /* Insert register number. */
> @@ -318,17 +338,11 @@ aarch64_ins_imm (const aarch64_operand *self, const aarch64_opnd_info *info,
> const aarch64_inst *inst ATTRIBUTE_UNUSED)
> {
> int64_t imm;
> - /* Maximum of two fields to insert. */
> - assert (self->fields[2] == FLD_NIL);
>
> imm = info->imm.value;
> if (operand_need_shift_by_two (self))
> imm >>= 2;
> - if (self->fields[1] == FLD_NIL)
> - insert_field (self->fields[0], code, imm, 0);
> - else
> - /* e.g. TBZ b5:b40. */
> - insert_fields (code, imm, 0, 2, self->fields[1], self->fields[0]);
> + insert_all_fields (self, code, imm);
> return NULL;
> }
>
> diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
> index 9ffc713..67daa66 100644
> --- a/opcodes/aarch64-dis.c
> +++ b/opcodes/aarch64-dis.c
> @@ -145,6 +145,26 @@ extract_fields (aarch64_insn code, aarch64_insn mask, ...)
> return value;
> }
>
> +/* Extract the value of all fields in SELF->fields from instruction CODE.
> + The least significant bit comes from the final field. */
> +
> +static aarch64_insn
> +extract_all_fields (const aarch64_operand *self, aarch64_insn code)
> +{
> + aarch64_insn value;
> + unsigned int i;
> + enum aarch64_field_kind kind;
> +
> + value = 0;
> + for (i = 0; i < ARRAY_SIZE (self->fields) && self->fields[i] != FLD_NIL; ++i)
> + {
> + kind = self->fields[i];
> + value <<= fields[kind].width;
> + value |= extract_field (kind, code, 0);
> + }
> + return value;
> +}
> +
> /* Sign-extend bit I of VALUE. */
> static inline int32_t
> sign_extend (aarch64_insn value, unsigned i)
> @@ -575,14 +595,8 @@ aarch64_ext_imm (const aarch64_operand *self, aarch64_opnd_info *info,
> const aarch64_inst *inst ATTRIBUTE_UNUSED)
> {
> int64_t imm;
> - /* Maximum of two fields to extract. */
> - assert (self->fields[2] == FLD_NIL);
>
> - if (self->fields[1] == FLD_NIL)
> - imm = extract_field (self->fields[0], code, 0);
> - else
> - /* e.g. TBZ b5:b40. */
> - imm = extract_fields (code, 0, 2, self->fields[0], self->fields[1]);
> + imm = extract_all_fields (self, code);
>
> if (info->type == AARCH64_OPND_FPIMM)
> info->imm.is_fp = 1;
>