Re: [PATCH v2] x86/Intel: don't accept bogus instructions

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Thu, Jun 30, 2016 at 5:27 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Thu, Jun 30, 2016 at 5:25 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> ... due to their last byte looking like a suffix, when after its
>> stripping a matching instruction can be found. Since memory operand
>> size specifiers in Intel mode get converted into suffix representation
>> internally, we need to keep track of the actual mnemonic suffix which
>> may have got trimmed off, and check its validity while looking for a
>> matching template. I tripper over this quite some time again after
>> support for AMD's SSE5 instructions got removed, as at that point some
>> of the SSE5 mnemonics, other than expected, didn't fail to assemble.
>> But the problem affects many more instructions, namely (almost) all
>> MMX, SSE, and AVX ones as it looks. I don't think it makes sense to
>> add a testcase covering all of them, nor do I think it makes sense to
>> pick out some random examples for a new test case.
>>
>> gas/
>> 2016-06-30  Jan Beulich  <jbeulich@suse.com>
>>
>>         PR gas/20318
>>         * config/tc-i386.c (match_template): Add char parameter,
>>         consumed in Intel mode for an extra suffix check.
>>         (md_assemble): New local variable mnem_suffix.
>>
>> gas/testsuite/
>> 2016-06-30  Jan Beulich  <jbeulich@suse.com>
>>

Please also add PR gas/20318 here.

>>         * gas/i386/suffix-bad.s: New.
>>         * gas/i386/suffix-bad.l: New.
>>         * gas/i386/i386.exp: Run new test (twice).
>>
>
> OK.  Thanks.
>
>
> --
> H.J.



-- 
H.J.