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Re: [PATCH] x86/Intel: don't accept bogus instructions
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Jan Beulich <JBeulich at suse dot com>
- Cc: Binutils <binutils at sourceware dot org>
- Date: Thu, 30 Jun 2016 04:18:34 -0700
- Subject: Re: [PATCH] x86/Intel: don't accept bogus instructions
- Authentication-results: sourceware.org; auth=none
- References: <577511DA02000078000FA074 at prv-mh dot provo dot novell dot com>
On Thu, Jun 30, 2016 at 3:34 AM, Jan Beulich <JBeulich@suse.com> wrote:
> ... due to their last byte looking like a suffix, when after its
> stripping a matching instruction can be found. Since memory operand
> size specifiers in Intel mode get converted into suffix representation
> internally, we need to keep track of the actual mnemonic suffix which
> may have got trimmed off, and check its validity while looking for a
> matching template. I tripper over this quite some time again after
> support for AMD's SSE5 instructions got removed, as at that point some
> of the SSE5 mnemonics, other than expected, didn't fail to assemble.
> But the problem affects many more instructions, namely (almost) all
> MMX, SSE, and AVX ones as it looks. I don't think it makes sense to
> add a testcase covering all of them, nor do I think it makes sense to
> pick out some random examples for a new test case.
Please open a bug report to show there is a problem.