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Re: [PATCH] Allow setting CpuVRex bit in .arch directive
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Jakub Jelinek <jakub at redhat dot com>
- Cc: Binutils <binutils at sourceware dot org>, Uros Bizjak <ubizjak at gmail dot com>, Kirill Yukhin <kirill dot yukhin at gmail dot com>
- Date: Wed, 25 May 2016 15:22:03 -0700
- Subject: Re: [PATCH] Allow setting CpuVRex bit in .arch directive
- Authentication-results: sourceware.org; auth=none
- References: <20160521165405 dot GQ28550 at tucnak dot redhat dot com> <20160521170615 dot GE1875 at tucnak dot redhat dot com> <CAMe9rOrSYftrqeWjZQYmWmn7x_h9vHfz9Fcy3=UVUDNr+O2aCA at mail dot gmail dot com> <20160524174933 dot GN28550 at tucnak dot redhat dot com> <CAMe9rOqQp54VXOvQPVwZDzSGDH1=_YB6Ghnekh=SRJQcsCVY3w at mail dot gmail dot com>
On Tue, May 24, 2016 at 12:02 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, May 24, 2016 at 10:49 AM, Jakub Jelinek <jakub@redhat.com> wrote:
>>> Since vinsertf64x2 is an CpuAVX512VL instruction, I don't see
>>> why it shouldn't assemble.
>>
>> Is it? I believe only vinsertf32x4 is, vinsertf64x2 is
>> CpuAVX512VL & CpuAVX512DQ:
>>
>> EVEX.NDS.256.66.0F3A.W0 18 /r ib T4 V/V AVX512VL Insert 128 bits of packed single-precision floating-
>> VINSERTF32X4 ymm1 {k1}{z}, ymm2, AVX512F point values from xmm3/m128 and the remaining
>> xmm3/m128, imm8 values from ymm2 into ymm1 under writemask k1.
>>
>> EVEX.NDS.512.66.0F3A.W0 18 /r ib T4 V/V AVX512F Insert 128 bits of packed single-precision floating-
>> VINSERTF32X4 zmm1 {k1}{z}, zmm2, point values from xmm3/m128 and the remaining
>> xmm3/m128, imm8 values from zmm2 into zmm1 under writemask k1.
>>
>> EVEX.NDS.256.66.0F3A.W1 18 /r ib T2 V/V AVX512VL Insert 128 bits of packed double-precision floating-
>> VINSERTF64X2 ymm1 {k1}{z}, ymm2, AVX512DQ point values from xmm3/m128 and the remaining
>> xmm3/m128, imm8 values from ymm2 into ymm1 under writemask k1.
>>
>> EVEX.NDS.512.66.0F3A.W1 18 /r ib T2 V/V AVX512DQ Insert 128 bits of packed double-precision floating-
>> VINSERTF64X2 zmm1 {k1}{z}, zmm2, point values from xmm3/m128 and the remaining
>> xmm3/m128, imm8 values from zmm2 into zmm1 under writemask k1.
>>
>> vinsertf64x2, 4, 0x6618, None, 1, CpuAVX512DQ|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexOpcode=2|VexVVVV=1|VexW=2|VecESize=1|Disp8MemShift=4|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|XMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegYMM, RegYMM }
>>
>> At least in 319433-024.pdf I see in 5.1.5:
>>
>> The fourth column holds abbreviated CPUID feature flags (e.g. appropriate
>> bits in CPUID.1:ECX, CPUID.1:EDX for SSE/SSE2/SSE3/SSSE3/SSE4.1/SSE4.2/AVX/F16C support; bits in
>> CPUID.(EAX=07H,ECX=0):BCX for AVX2/AVX512F etc) that indicate processor support for the instruction. If
>> the corresponding flag is â0â, the instruction will #UD.
>>
>> Therefore, my understanding is that you need all the mentioned flags enabled
>> or it will #UD. Does binutils treat CpuAVX512DQ|CpuAVX512VL instead
>> as the insn being enabled in either .arch .avx512vl, or .arch .avx512dq
>> alone, rather than only in .arch .avx512vl; .arch .avx512dq ?
>>
>
> I opened:
>
> https://sourceware.org/bugzilla/show_bug.cgi?id=20140
>
This is what I checked in.
--
H.J.
From 8ab4e8bfc05d8d7d92e62a439d20190ea1814b5c Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hjl.tools@gmail.com>
Date: Wed, 25 May 2016 14:59:05 -0700
Subject: [PATCH] Require another match for AVX512VL
The AVX512VL bit alone isn't sufficient to select a 128-bit or 256-bit
AVX512 instruction. We must match another AVX512 bit.
PR gas/20140
* config/tc-i386.c (cpu_flags_match): Require another match
for AVX512VL.
* testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2,
x86-64-avx512vl-1 and x86-64-avx512vl-2.
* testsuite/gas/i386/avx512vl-1.l: New file.
* testsuite/gas/i386/avx512vl-1.s: Likewise.
* testsuite/gas/i386/avx512vl-2.l: Likewise.
* testsuite/gas/i386/avx512vl-2.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise.
* testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise.
* testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
* testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
---
gas/ChangeLog | 16 ++++++++++++
gas/config/tc-i386.c | 15 ++++++++++++
gas/testsuite/gas/i386/avx512vl-1.l | 39 ++++++++++++++++++++++++++++++
gas/testsuite/gas/i386/avx512vl-1.s | 24 ++++++++++++++++++
gas/testsuite/gas/i386/avx512vl-2.l | 27 +++++++++++++++++++++
gas/testsuite/gas/i386/avx512vl-2.s | 15 ++++++++++++
gas/testsuite/gas/i386/i386.exp | 4 +++
gas/testsuite/gas/i386/x86-64-avx512vl-1.l | 39 ++++++++++++++++++++++++++++++
gas/testsuite/gas/i386/x86-64-avx512vl-1.s | 24 ++++++++++++++++++
gas/testsuite/gas/i386/x86-64-avx512vl-2.l | 27 +++++++++++++++++++++
gas/testsuite/gas/i386/x86-64-avx512vl-2.s | 15 ++++++++++++
11 files changed, 245 insertions(+)
create mode 100644 gas/testsuite/gas/i386/avx512vl-1.l
create mode 100644 gas/testsuite/gas/i386/avx512vl-1.s
create mode 100644 gas/testsuite/gas/i386/avx512vl-2.l
create mode 100644 gas/testsuite/gas/i386/avx512vl-2.s
create mode 100644 gas/testsuite/gas/i386/x86-64-avx512vl-1.l
create mode 100644 gas/testsuite/gas/i386/x86-64-avx512vl-1.s
create mode 100644 gas/testsuite/gas/i386/x86-64-avx512vl-2.l
create mode 100644 gas/testsuite/gas/i386/x86-64-avx512vl-2.s
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2d23b43..da0cdc0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,21 @@
2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
+ PR gas/20140
+ * config/tc-i386.c (cpu_flags_match): Require another match
+ for AVX512VL.
+ * testsuite/gas/i386/i386.exp: Run avx512vl-1, avx512vl-2,
+ x86-64-avx512vl-1 and x86-64-avx512vl-2.
+ * testsuite/gas/i386/avx512vl-1.l: New file.
+ * testsuite/gas/i386/avx512vl-1.s: Likewise.
+ * testsuite/gas/i386/avx512vl-2.l: Likewise.
+ * testsuite/gas/i386/avx512vl-2.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-1.l: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-1.s: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.l: Likewise.
+ * testsuite/gas/i386/x86-64-avx512vl-2.s: Likewise.
+
+2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
PR gas/20141
* testsuite/gas/i386/i386.exp: Run x86-64-pr20141.
* testsuite/gas/i386/x86-64-pr20141.d: New file.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 13041ea..af94f72 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1564,6 +1564,21 @@ cpu_flags_match (const insn_template *t)
else
match |= CPU_FLAGS_ARCH_MATCH;
}
+ else if (x.bitfield.cpuavx512vl)
+ {
+ /* Match AVX512VL. */
+ if (cpu.bitfield.cpuavx512vl)
+ {
+ /* Need another match. */
+ cpu.bitfield.cpuavx512vl = 0;
+ if (!cpu_flags_all_zero (&cpu))
+ match |= CPU_FLAGS_32BIT_MATCH;
+ else
+ match |= CPU_FLAGS_ARCH_MATCH;
+ }
+ else
+ match |= CPU_FLAGS_ARCH_MATCH;
+ }
else
match |= CPU_FLAGS_32BIT_MATCH;
}
diff --git a/gas/testsuite/gas/i386/avx512vl-1.l b/gas/testsuite/gas/i386/avx512vl-1.l
new file mode 100644
index 0000000..183c21d
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl-1.l
@@ -0,0 +1,39 @@
+.*: Assembler messages:
+.*:7: Error: .*bad register name.*
+.*:8: Error: .*corei7\.avx.*
+.*:9: Error: .*corei7\.avx.*
+.*:10: Error: .*corei7\.avx.*
+.*:15: Error: .*unsupported.*
+.*:16: Error: .*unsupported.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\.text
+[ ]*2[ ]+\.arch corei7
+[ ]*3[ ]+_start:
+[ ]*4[ ]+\.arch \.avx
+[ ]*5[ ]+\?\?\?\? C5F9E711 vmovntdq %xmm2, \(%ecx\)
+[ ]*6[ ]+\?\?\?\? C5FDE711 vmovntdq %ymm2, \(%ecx\)
+[ ]*7[ ]+vmovntdq %zmm2, \(%ecx\)
+[ ]*8[ ]+vpternlogq \$0xab, %xmm6, %xmm2, %xmm0
+[ ]*9[ ]+vpternlogq \$0xab, %ymm6, %ymm2, %ymm0
+[ ]*10[ ]+vpternlogq \$0xab, %zmm6, %zmm2, %zmm0
+[ ]*11[ ]+\.arch \.avx512f
+[ ]*12[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%ecx\)
+[ ]*13[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%ecx\)
+[ ]*14[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%ecx\)
+[ ]*14[ ]+E701
+[ ]*15[ ]+vpternlogq \$0xab, %xmm6, %xmm2, %xmm0
+[ ]*16[ ]+vpternlogq \$0xab, %ymm6, %ymm2, %ymm0
+[ ]*17[ ]+\?\?\?\? 62F3ED48 vpternlogq \$0xab, %zmm6, %zmm2, %zmm0
+[ ]*17[ ]+25C6AB
+[ ]*18[ ]+\.arch \.avx512vl
+[ ]*19[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%ecx\)
+[ ]*20[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%ecx\)
+[ ]*21[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%ecx\)
+[ ]*21[ ]+E701
+[ ]*22[ ]+\?\?\?\? 62F3ED08 vpternlogq \$0xab, %xmm6, %xmm2, %xmm0
+[ ]*22[ ]+25C6AB
+[ ]*23[ ]+\?\?\?\? 62F3ED28 vpternlogq \$0xab, %ymm6, %ymm2, %ymm0
+[ ]*23[ ]+25C6AB
+[ ]*24[ ]+\?\?\?\? 62F3ED48 vpternlogq \$0xab, %zmm6, %zmm2, %zmm0
+[ ]*24[ ]+25C6AB
diff --git a/gas/testsuite/gas/i386/avx512vl-1.s b/gas/testsuite/gas/i386/avx512vl-1.s
new file mode 100644
index 0000000..62bae08
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl-1.s
@@ -0,0 +1,24 @@
+ .text
+ .arch corei7
+_start:
+ .arch .avx
+ vmovntdq %xmm2, (%ecx)
+ vmovntdq %ymm2, (%ecx)
+ vmovntdq %zmm2, (%ecx)
+ vpternlogq $0xab, %xmm6, %xmm2, %xmm0
+ vpternlogq $0xab, %ymm6, %ymm2, %ymm0
+ vpternlogq $0xab, %zmm6, %zmm2, %zmm0
+ .arch .avx512f
+ vmovntdq %xmm0, (%ecx)
+ vmovntdq %ymm0, (%ecx)
+ vmovntdq %zmm0, (%ecx)
+ vpternlogq $0xab, %xmm6, %xmm2, %xmm0
+ vpternlogq $0xab, %ymm6, %ymm2, %ymm0
+ vpternlogq $0xab, %zmm6, %zmm2, %zmm0
+ .arch .avx512vl
+ vmovntdq %xmm0, (%ecx)
+ vmovntdq %ymm0, (%ecx)
+ vmovntdq %zmm0, (%ecx)
+ vpternlogq $0xab, %xmm6, %xmm2, %xmm0
+ vpternlogq $0xab, %ymm6, %ymm2, %ymm0
+ vpternlogq $0xab, %zmm6, %zmm2, %zmm0
diff --git a/gas/testsuite/gas/i386/avx512vl-2.l b/gas/testsuite/gas/i386/avx512vl-2.l
new file mode 100644
index 0000000..2f1f7b3
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl-2.l
@@ -0,0 +1,27 @@
+.*: Assembler messages:
+.*:5: Error: .*corei7.*
+.*:6: Error: .*corei7.*
+.*:7: Error: .*corei7.*
+.*:9: Error: .*corei7\.avx\.avx512vl.*
+.*:10: Error: .*corei7\.avx\.avx512vl.*
+.*:11: Error: .*corei7\.avx\.avx512vl.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\.text
+[ ]*2[ ]+\.arch corei7
+[ ]*3[ ]+_start:
+[ ]*4[ ]+\.arch \.avx
+[ ]*5[ ]+vpconflictd %xmm0, %xmm5
+[ ]*6[ ]+vpconflictd %ymm0, %ymm5
+[ ]*7[ ]+vpconflictd %ymm0, %zmm5
+[ ]*8[ ]+\.arch \.avx512vl
+[ ]*9[ ]+vpconflictd %xmm0, %xmm5
+[ ]*10[ ]+vpconflictd %ymm0, %ymm5
+[ ]*11[ ]+vpconflictd %zmm0, %zmm5
+[ ]*12[ ]+\.arch \.avx512cd
+[ ]*13[ ]+\?\?\?\? 62F27D08 vpconflictd %xmm0, %xmm5
+[ ]*13[ ]+C4E8
+[ ]*14[ ]+\?\?\?\? 62F27D28 vpconflictd %ymm0, %ymm5
+[ ]*14[ ]+C4E8
+[ ]*15[ ]+\?\?\?\? 62F27D48 vpconflictd %zmm0, %zmm5
+[ ]*15[ ]+C4E8
diff --git a/gas/testsuite/gas/i386/avx512vl-2.s b/gas/testsuite/gas/i386/avx512vl-2.s
new file mode 100644
index 0000000..6a24a1f
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512vl-2.s
@@ -0,0 +1,15 @@
+ .text
+ .arch corei7
+_start:
+ .arch .avx
+ vpconflictd %xmm0, %xmm5
+ vpconflictd %ymm0, %ymm5
+ vpconflictd %ymm0, %zmm5
+ .arch .avx512vl
+ vpconflictd %xmm0, %xmm5
+ vpconflictd %ymm0, %ymm5
+ vpconflictd %zmm0, %zmm5
+ .arch .avx512cd
+ vpconflictd %xmm0, %xmm5
+ vpconflictd %ymm0, %ymm5
+ vpconflictd %zmm0, %zmm5
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 1aca467..624674d 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -356,6 +356,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "ospke"
run_dump_test "rdpid"
run_dump_test "rdpid-intel"
+ run_list_test "avx512vl-1" "-al"
+ run_list_test "avx512vl-2" "-al"
# These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets.
@@ -754,6 +756,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-fence-as-lock-add-yes"
run_dump_test "x86-64-fence-as-lock-add-no"
run_dump_test "x86-64-pr20141"
+ run_list_test "x86-64-avx512vl-1" "-al"
+ run_list_test "x86-64-avx512vl-2" "-al"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl-1.l b/gas/testsuite/gas/i386/x86-64-avx512vl-1.l
new file mode 100644
index 0000000..c5982e7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl-1.l
@@ -0,0 +1,39 @@
+.*: Assembler messages:
+.*:7: Error: .*bad register name.*
+.*:8: Error: .*corei7\.avx.*
+.*:9: Error: .*corei7\.avx.*
+.*:10: Error: .*corei7\.avx.*
+.*:15: Error: .*unsupported.*
+.*:16: Error: .*unsupported.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\.text
+[ ]*2[ ]+\.arch corei7
+[ ]*3[ ]+_start:
+[ ]*4[ ]+\.arch \.avx
+[ ]*5[ ]+\?\?\?\? C5F9E711 vmovntdq %xmm2, \(%rcx\)
+[ ]*6[ ]+\?\?\?\? C5FDE711 vmovntdq %ymm2, \(%rcx\)
+[ ]*7[ ]+vmovntdq %zmm2, \(%rcx\)
+[ ]*8[ ]+vpternlogq \$0xab, %xmm16, %xmm2, %xmm0
+[ ]*9[ ]+vpternlogq \$0xab, %ymm16, %ymm2, %ymm0
+[ ]*10[ ]+vpternlogq \$0xab, %zmm16, %zmm2, %zmm0
+[ ]*11[ ]+\.arch \.avx512f
+[ ]*12[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%rcx\)
+[ ]*13[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%rcx\)
+[ ]*14[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%rcx\)
+[ ]*14[ ]+E701
+[ ]*15[ ]+vpternlogq \$0xab, %xmm16, %xmm2, %xmm0
+[ ]*16[ ]+vpternlogq \$0xab, %ymm16, %ymm2, %ymm0
+[ ]*17[ ]+\?\?\?\? 62B3ED48 vpternlogq \$0xab, %zmm16, %zmm2, %zmm0
+[ ]*17[ ]+25C0AB
+[ ]*18[ ]+\.arch \.avx512vl
+[ ]*19[ ]+\?\?\?\? C5F9E701 vmovntdq %xmm0, \(%rcx\)
+[ ]*20[ ]+\?\?\?\? C5FDE701 vmovntdq %ymm0, \(%rcx\)
+[ ]*21[ ]+\?\?\?\? 62F17D48 vmovntdq %zmm0, \(%rcx\)
+[ ]*21[ ]+E701
+[ ]*22[ ]+\?\?\?\? 62B3ED08 vpternlogq \$0xab, %xmm16, %xmm2, %xmm0
+[ ]*22[ ]+25C0AB
+[ ]*23[ ]+\?\?\?\? 62B3ED28 vpternlogq \$0xab, %ymm16, %ymm2, %ymm0
+[ ]*23[ ]+25C0AB
+[ ]*24[ ]+\?\?\?\? 62B3ED48 vpternlogq \$0xab, %zmm16, %zmm2, %zmm0
+[ ]*24[ ]+25C0AB
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl-1.s b/gas/testsuite/gas/i386/x86-64-avx512vl-1.s
new file mode 100644
index 0000000..8a5f2f9
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl-1.s
@@ -0,0 +1,24 @@
+ .text
+ .arch corei7
+_start:
+ .arch .avx
+ vmovntdq %xmm2, (%rcx)
+ vmovntdq %ymm2, (%rcx)
+ vmovntdq %zmm2, (%rcx)
+ vpternlogq $0xab, %xmm16, %xmm2, %xmm0
+ vpternlogq $0xab, %ymm16, %ymm2, %ymm0
+ vpternlogq $0xab, %zmm16, %zmm2, %zmm0
+ .arch .avx512f
+ vmovntdq %xmm0, (%rcx)
+ vmovntdq %ymm0, (%rcx)
+ vmovntdq %zmm0, (%rcx)
+ vpternlogq $0xab, %xmm16, %xmm2, %xmm0
+ vpternlogq $0xab, %ymm16, %ymm2, %ymm0
+ vpternlogq $0xab, %zmm16, %zmm2, %zmm0
+ .arch .avx512vl
+ vmovntdq %xmm0, (%rcx)
+ vmovntdq %ymm0, (%rcx)
+ vmovntdq %zmm0, (%rcx)
+ vpternlogq $0xab, %xmm16, %xmm2, %xmm0
+ vpternlogq $0xab, %ymm16, %ymm2, %ymm0
+ vpternlogq $0xab, %zmm16, %zmm2, %zmm0
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl-2.l b/gas/testsuite/gas/i386/x86-64-avx512vl-2.l
new file mode 100644
index 0000000..10833f6
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl-2.l
@@ -0,0 +1,27 @@
+.*: Assembler messages:
+.*:5: Error: .*corei7.*
+.*:6: Error: .*corei7.*
+.*:7: Error: .*corei7.*
+.*:9: Error: .*corei7\.avx\.avx512vl.*
+.*:10: Error: .*corei7\.avx\.avx512vl.*
+.*:11: Error: .*corei7\.avx\.avx512vl.*
+GAS LISTING .*
+#...
+[ ]*1[ ]+\.text
+[ ]*2[ ]+\.arch corei7
+[ ]*3[ ]+_start:
+[ ]*4[ ]+\.arch \.avx
+[ ]*5[ ]+vpconflictd %xmm0, %xmm25
+[ ]*6[ ]+vpconflictd %ymm0, %ymm25
+[ ]*7[ ]+vpconflictd %ymm0, %zmm25
+[ ]*8[ ]+\.arch \.avx512vl
+[ ]*9[ ]+vpconflictd %xmm0, %xmm25
+[ ]*10[ ]+vpconflictd %ymm0, %ymm25
+[ ]*11[ ]+vpconflictd %zmm0, %zmm25
+[ ]*12[ ]+\.arch \.avx512cd
+[ ]*13[ ]+\?\?\?\? 62627D08 vpconflictd %xmm0, %xmm25
+[ ]*13[ ]+C4C8
+[ ]*14[ ]+\?\?\?\? 62627D28 vpconflictd %ymm0, %ymm25
+[ ]*14[ ]+C4C8
+[ ]*15[ ]+\?\?\?\? 62627D48 vpconflictd %zmm0, %zmm25
+[ ]*15[ ]+C4C8
diff --git a/gas/testsuite/gas/i386/x86-64-avx512vl-2.s b/gas/testsuite/gas/i386/x86-64-avx512vl-2.s
new file mode 100644
index 0000000..2b64c70
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl-2.s
@@ -0,0 +1,15 @@
+ .text
+ .arch corei7
+_start:
+ .arch .avx
+ vpconflictd %xmm0, %xmm25
+ vpconflictd %ymm0, %ymm25
+ vpconflictd %ymm0, %zmm25
+ .arch .avx512vl
+ vpconflictd %xmm0, %xmm25
+ vpconflictd %ymm0, %ymm25
+ vpconflictd %zmm0, %zmm25
+ .arch .avx512cd
+ vpconflictd %xmm0, %xmm25
+ vpconflictd %ymm0, %ymm25
+ vpconflictd %zmm0, %zmm25
--
2.5.5