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Re: PowerPC64 ELFv2 entry code
- From: Alan Modra <amodra at gmail dot com>
- To: binutils at sourceware dot org
- Date: Thu, 4 Feb 2016 00:33:36 +1030
- Subject: Re: PowerPC64 ELFv2 entry code
- Authentication-results: sourceware.org; auth=none
- References: <20160202133333 dot GA13041 at bubble dot grove dot modra dot org>
On Wed, Feb 03, 2016 at 12:03:33AM +1030, Alan Modra wrote:
> This tightens the condition under which ld optimizes PIC entry code
> to non-PIC, not that I expect anyone sane would write code that might
> cause the existing optimization to fail.
>
> bfd/
> * elf64-ppc.c (ppc64_elf_relocate_section): Further restrict
> ELFv2 entry optimization.
> gold/
> * powerpc.cc (relocate): Further restrict ELFv2 entry optimization.
This wasn't correct for big-endian ELFv2. Thanks to Nick for the
alert. If I'd run the testsuite for powerpc64-linux instead of just
powerpc64le-linux I'd have found this out myself..
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Adjust last patch
for big-endian.
gold/
* powerpc.cc (relocate): Adjust last patch for big-endian.
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 369eae5..f0bcee1 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -13915,7 +13915,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
if (!bfd_link_pic (info)
&& !info->traditional_format
&& !htab->opd_abi
- && rel->r_addend == 0
+ && rel->r_addend == d_offset
&& h != NULL && &h->elf == htab->elf.hgot
&& rel + 1 < relend
&& rel[1].r_info == ELF64_R_INFO (r_symndx, R_PPC64_REL16_LO)
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index 6df2904..60530ba 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -7727,7 +7727,7 @@ Target_powerpc<size, big_endian>::Relocate::relocate(
&& preloc != NULL
&& target->abiversion() >= 2
&& !parameters->options().output_is_position_independent()
- && rela.get_r_addend() == 4
+ && rela.get_r_addend() == d_offset + 4
&& gsym != NULL
&& strcmp(gsym->name(), ".TOC.") == 0)
{