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[committed] MIPS/BFD: Simplify register index calculation in BZ16_REG_FIELD
- From: "Maciej W. Rozycki" <macro at imgtec dot com>
- To: <binutils at sourceware dot org>
- Date: Sun, 24 Jan 2016 01:07:31 +0000
- Subject: [committed] MIPS/BFD: Simplify register index calculation in BZ16_REG_FIELD
- Authentication-results: sourceware.org; auth=none
Just mask higher bits off, which returns the same set of 3-bit register
encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } for the allowed 5-bit encodings
of { 16, 17, 2, 3, 4, 5, 6, 7 }. Input has already been validated with
OP16_VALID_REG.
bfd/
* elfxx-mips.c (BZ16_REG_FIELD): Simplify calculation.
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 176970a..fa14e8d 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -13111,8 +13111,7 @@ static const struct opcode_descriptor bz_insns_16[] = {
/* Switch between a 5-bit register index and its 3-bit shorthand. */
#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2)
-#define BZ16_REG_FIELD(r) \
- (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7)
+#define BZ16_REG_FIELD(r) (((r) & 7) << 7)
/* 32-bit instructions with a delay slot. */