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Add cores for M5100 series
- From: Robert Suchanek <Robert dot Suchanek at imgtec dot com>
- To: Matthew Fortune <Matthew dot Fortune at imgtec dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>, "rdsandiford at googlemail dot com" <rdsandiford at googlemail dot com>
- Date: Thu, 16 Jul 2015 15:19:29 +0000
- Subject: Add cores for M5100 series
- Authentication-results: sourceware.org; auth=none
Hi,
The patch below add new options for -march=: m5100 and m5101.
Ok to commit?
Regards,
Robert
gas/
* config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries.
* doc/c-mips.texi: Document m5100 and m5101 for -march=.
---
gas/config/tc-mips.c | 3 +++
gas/doc/c-mips.texi | 2 ++
2 files changed, 5 insertions(+)
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index f67fbd0..ea1a420 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -18666,6 +18666,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
{ "1004kf2_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 },
{ "1004kf", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 },
{ "1004kf1_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 },
+ /* M5100 family */
+ { "m5100", 0, ASE_MCU, ISA_MIPS32R5, CPU_MIPS32R5 },
+ { "m5101", 0, ASE_MCU, ISA_MIPS32R5, CPU_MIPS32R5 },
/* P5600 with EVA and Virtualization ASEs, other ASEs are optional. */
{ "p5600", 0, ASE_VIRT | ASE_EVA | ASE_XPA, ISA_MIPS32R5, CPU_MIPS32R5 },
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index f72db68..321d8b3 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -369,6 +369,8 @@ m14kec,
1004kf2_1,
1004kf,
1004kf1_1,
+m5100,
+m5101,
p5600,
5kc,
5kf,
--
2.4.5