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Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: "Kirill Yukhin" <kirill dot yukhin at gmail dot com>, "Christian Ludloff" <ludloff at google dot com>, "Binutils" <binutils at sourceware dot org>,"H. Peter Anvin" <hpa at zytor dot com>
- Date: Thu, 21 May 2015 17:04:54 +0100
- Subject: Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Authentication-results: sourceware.org; auth=none
- References: <552FE0630200007800072CD0 at mail dot emea dot novell dot com> <CAMe9rOomWLMwQT6R2qLr1p7_dzmwuNLsz2PEk-6tV3NTt_=24Q at mail dot gmail dot com> <55390A6A0200007800075263 at mail dot emea dot novell dot com> <CAMe9rOrSX3cgXCSJFsbDnKgnyNrX-Y4cYO2VL4uTrKV-O3fcCw at mail dot gmail dot com> <554906C70200007800076D28 at mail dot emea dot novell dot com> <CAMe9rOp2bUnsU+Tn4RKLNw48h6JGiaGaX1ddqpGhyM3tsF7pTg at mail dot gmail dot com> <5549E2820200007800076F5F at mail dot emea dot novell dot com> <555D9794020000780007C89A at mail dot emea dot novell dot com> <CAMe9rOoe8s+3iPvpbhF2p=c96zyvYijQ9eqs+4Gx5biF1E80OA at mail dot gmail dot com> <555DDF7B020000780007CB72 at mail dot emea dot novell dot com> <CAMe9rOrxdYQUSbwX9Vw-5TCcPsa+BYKgn9S740NeOAqMKKKr6A at mail dot gmail dot com> <555E0FB5020000780007CCCE at mail dot emea dot novell dot com> <CAMe9rOokzgHdYBkC1CFfc52fgat5zr=M6jTFekXK4HsL2bV9UQ at mail dot gmail dot com>
>>> On 21.05.15 at 17:11, <hjl.tools@gmail.com> wrote:
> On Thu, May 21, 2015 at 8:02 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>> On 21.05.15 at 14:07, <hjl.tools@gmail.com> wrote:
>>> I checked with our SDM people and was told that
>>>
>>> ---
>>> Intel Software Developer Manual only governs the output side of the binary
>>> form of instruction byte stream matches what HW expect. Each assembly
>>> tool product has its own implementation of transforming the input
>>> language/dialect into the output stream.
>>> ---
>>
>> Of course. But I don't think you're going to deny that what it (or
>> really its ancient predecessors) specified has been taken by
>> assembler implementations as reference.
>
> Intel SDM is NOT an assembler reference manual. Please stop
> making it into one.
It's not, I agree. But in the absence of any other one, it is (and
imo ought to be) used as a reference anyway.
Jan
- References:
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
- Re: [PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}