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Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Jan Beulich <JBeulich at suse dot com>
- Cc: Binutils <binutils at sourceware dot org>, Michael Matz <matz at suse dot de>
- Date: Wed, 13 May 2015 06:15:26 -0700
- Subject: Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Authentication-results: sourceware.org; auth=none
- References: <20150511212331 dot GA1838 at intel dot com> <5551F4E70200007800079575 at mail dot emea dot novell dot com> <CAMe9rOpDbkeFbmNbQh0a1AKhAQy-cH4HJu20o_ERQaoR6sTxbQ at mail dot gmail dot com> <55520C440200007800079718 at mail dot emea dot novell dot com> <CAMe9rOpFgSyJm-oceuDkrBYnBQGv01ywCc43WySqX21NTJYi4Q at mail dot gmail dot com> <555216370200007800079773 at mail dot emea dot novell dot com> <CAMe9rOpOx=SSUZnCFimn4fBzFqNRDch8QYLn3Os_y7EfQH65Qw at mail dot gmail dot com> <5552318402000078000798A8 at mail dot emea dot novell dot com> <CAMe9rOoqcr7aE8dr6E44KUK6JLrNMNcDNFFWhcb6K+14M=Y+=w at mail dot gmail dot com> <555233B602000078000798EF at mail dot emea dot novell dot com> <CAMe9rOrOS+K0R+r1jHCNwAkgrhjftHUOGt_wTuP8wRYcPdifmQ at mail dot gmail dot com> <555235930200007800079911 at mail dot emea dot novell dot com> <alpine dot LSU dot 2 dot 20 dot 1505121736050 dot 4883 at wotan dot suse dot de> <CAMe9rOo76QirYvEH=tX7BDBws3z=g0O8c+A1wSp+19yaNXUk1w at mail dot gmail dot com> <alpine dot LSU dot 2 dot 20 dot 1505121745550 dot 27315 at wotan dot suse dot de> <CAMe9rOqM+cojMqoz9Kwb_KedgZG-14_xFaV2mk=hNEQGUkDWVw at mail dot gmail dot com> <alpine dot LSU dot 2 dot 20 dot 1505121803030 dot 27315 at wotan dot suse dot de> <CAMe9rOqECoP=-Bz4neR1LnFsnPO94axMuSpEiOzjmJzbNgA_kA at mail dot gmail dot com> <555308DB0200007800079CDA at mail dot emea dot novell dot com> <CAMe9rOrNtj+emYh-=1YRKrb7vuDPOAbdSWeX21JWABtATWaOfg at mail dot gmail dot com> <55535F58020000780007A08A at mail dot emea dot novell dot com>
On Wed, May 13, 2015 at 5:27 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 13.05.15 at 13:35, <hjl.tools@gmail.com> wrote:
>> On Tue, May 12, 2015 at 11:18 PM, Jan Beulich <JBeulich@suse.com> wrote:
>>> What _works_ on Intel processors is secondary here. Fact is that
>>> the x86-64 design came from AMD, and hence Intel CPUs doing
>>> things differently than AMD's is - be honest - a flaw. The more
>>
>> I don't think who came first is relevant here. What relevant are
>>
>> 1. AMD and Intel specs are different.
>
> Very interesting statement. If you want to stick to what Intel
> specifies, then look at the "N.S." of the respective CALL/JMP
> encodings. The explanation of N.S. specifically says "Using an
> address override prefix in 64-bit mode may result in model-
> specific execution behavior." I don't think you want the
> assembler to behave in model-specific ways.
Intel SDM says
A relative offset (rel16 or rel32) is generally specified as a label
in assembly code. But at the machine code level, it
is encoded as a signed, 16- or 32-bit immediate value. This value is
added to the value in the EIP(RIP) register. In
64-bit mode the relative offset is always a 32-bit immediate value
which is sign extended to 64-bits before it is
added to the value in the RIP register for the target calculation. As
with absolute offsets, the operand-size attribute
determines the size of the target operand (16, 32, or 64 bits). In
64-bit mode the target operand will always be 64-
bits because the operand size is forced to 64-bits for near branches.A
relative offset (rel16 or rel32) is generally specified as a label in
assembly code. But at the machine code level, it
is encoded as a signed, 16- or 32-bit immediate value. This value is
added to the value in the EIP(RIP) register. In
64-bit mode the relative offset is always a 32-bit immediate value
which is sign extended to 64-bits before it is
added to the value in the RIP register for the target calculation. As
with absolute offsets, the operand-size attribute
determines the size of the target operand (16, 32, or 64 bits). In
64-bit mode the target operand will always be 64-
bits because the operand size is forced to 64-bits for near branches.
It is always 64-bit in 64-bit mode on Intel processors.
> And again - Intel's treatment is inconsistent (operand size prefix
> meaning different things depending on context), while AMD's is
> consistent.
This isn't a good situation and I can't find a good compromise.
I am open to all suggestions.
--
H.J.
- References:
- [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches
- Re: [committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches