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[AArch64][gas][2.25] Backport code formatting fix in the cpu-table
- From: Matthew Wahab <matthew dot wahab at arm dot com>
- To: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Mon, 16 Feb 2015 12:27:27 +0000
- Subject: [AArch64][gas][2.25] Backport code formatting fix in the cpu-table
- Authentication-results: sourceware.org; auth=none
This patch backports to binutils-2.25 code formatting fixes for the
aarch64_cpus macros in tc-arch64.c/aarch64-cpu table. This will be
needed to keep the code formatting in gas-2.25 consistent with trunk.
The trunk patch is here:
https://sourceware.org/ml/binutils/2015-02/msg00148.html
The commit is here:
https://sourceware.org/ml/binutils-cvs/2015-02/msg00127.html
Tested aarch64-none-linux-gnu with check-gas.
Ok for the branch?
Matthew
gas/
2015-02-16 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c: Fix code formatting.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 0e58764..0fa512e 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7180,17 +7180,17 @@ struct aarch64_cpu_option_table
recognized by GCC. */
static const struct aarch64_cpu_option_table aarch64_cpus[] = {
{"all", AARCH64_ANY, NULL},
- {"cortex-a53", AARCH64_FEATURE(AARCH64_ARCH_V8,
- AARCH64_FEATURE_CRC), "Cortex-A53"},
- {"cortex-a57", AARCH64_FEATURE(AARCH64_ARCH_V8,
- AARCH64_FEATURE_CRC), "Cortex-A57"},
+ {"cortex-a53", AARCH64_FEATURE (AARCH64_ARCH_V8,
+ AARCH64_FEATURE_CRC), "Cortex-A53"},
+ {"cortex-a57", AARCH64_FEATURE (AARCH64_ARCH_V8,
+ AARCH64_FEATURE_CRC), "Cortex-A57"},
/* The 'xgene-1' name is an older name for 'xgene1', which was used
in earlier releases and is superseded by 'xgene1' in all
tools. */
{"xgene-1", AARCH64_ARCH_V8, "APM X-Gene 1"},
{"xgene1", AARCH64_ARCH_V8, "APM X-Gene 1"},
- {"xgene2", AARCH64_FEATURE(AARCH64_ARCH_V8,
- AARCH64_FEATURE_CRC), "APM X-Gene 2"},
+ {"xgene2", AARCH64_FEATURE (AARCH64_ARCH_V8,
+ AARCH64_FEATURE_CRC), "APM X-Gene 2"},
{"generic", AARCH64_ARCH_V8, NULL},
/* These two are example CPUs supported in GCC, once we have real