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[gold][aarch64]Patch to add support for TLSLE_MOVW_* relocations


Hi binutils,

LLVM aarch64 backend generates AARCH64_TLSLE_MOVW_* relocations that
were not supported by gold linker (bfd-ld supports them). This patch
adds such support.

On x86-64 and aarch64, configure and build binutils.
$../binutils-gdb/configure --enable-plugins --disable-multilib
--disable-nls --enable-threads --enable-gold=default
--enable-targets=all
Tested the small tls-le test that was generated by llvm.
Passed other local tls tests.

OK for trunk?

Thanks,
Jing

2015-02-10  Jing Yu  <jingyu@google.com>

        * aarch64-reloc.def (TLSLE_MOVW_TPREL_G2, TLSLE_MOVW_TPREL_G1,
        TLSLE_MOVW_TPREL_G1_NC, TLSLE_MOVW_TPREL_G0, TLSLE_MOVW_TPREL_G0_NC,):
        New relocation.
        * aarch64.cc (Target_aarch64::Scan::local): Add cases for new
        TLSLE_MOVW_* relocations.
        (Target_aarch64::Scan::global): Likewise.
        (Target_aarch64::Relocate::relocate): Likewise.
        (Target_aarch64::Relocate::relocate_tls): Add cases and handlings
        for new TLSLE_MOVW_* relocations.
diff --git a/gold/aarch64-reloc.def b/gold/aarch64-reloc.def
index 9fa9bac..d03d9b5 100644
--- a/gold/aarch64-reloc.def
+++ b/gold/aarch64-reloc.def
@@ -80,6 +80,11 @@ ARD(TLSIE_LD64_GOTTPREL_LO12_NC  , STATIC ,  AARCH64    ,   Y,  -1,    0,RL_CHEC
 ARD(TLSIE_LD_GOTTPREL_PREL19     , STATIC ,  AARCH64    ,   N,  -1,   20,20               ,    2,20 , Symbol::TLS_REF ,                              LD    )
 // Above is from Table 4-17, Initial Exec TLS relocations, 539-543.
 
+ARD(TLSLE_MOVW_TPREL_G2          , STATIC ,  AARCH64   ,    Y,   2,   48,48               ,   32,47 , Symbol::TLS_REF ,                              MOVW  )
+ARD(TLSLE_MOVW_TPREL_G1          , STATIC ,  AARCH64   ,    Y,   1,   32,32               ,   16,31 , Symbol::TLS_REF ,                              MOVW  )
+ARD(TLSLE_MOVW_TPREL_G1_NC       , STATIC ,  AARCH64   ,    Y,   1,    0,0                ,   16,31 , Symbol::TLS_REF ,                              MOVW  )
+ARD(TLSLE_MOVW_TPREL_G0          , STATIC ,  AARCH64   ,    Y,   0,   16,16               ,    0,15 , Symbol::TLS_REF ,                              MOVW  )
+ARD(TLSLE_MOVW_TPREL_G0_NC       , STATIC ,  AARCH64   ,    Y,   0,    0,0                ,    0,15 , Symbol::TLS_REF ,                              MOVW  )
 ARD(TLSLE_ADD_TPREL_HI12         , STATIC ,  AARCH64   ,    Y,  -1,    0,24               ,   12,23 , Symbol::TLS_REF ,                              ADD   )
 ARD(TLSLE_ADD_TPREL_LO12         , STATIC ,  AARCH64   ,    Y,  -1,    0,12               ,    0,11 , Symbol::TLS_REF ,                              ADD   )
 ARD(TLSLE_ADD_TPREL_LO12_NC      , STATIC ,  AARCH64   ,    Y,  -1,    0,0                ,    0,11 , Symbol::TLS_REF ,                              ADD   )
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index b16049e..31176a4 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -4860,6 +4860,11 @@ Target_aarch64<size, big_endian>::Scan::local(
       }
       break;
 
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G2:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_HI12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -5248,6 +5253,11 @@ Target_aarch64<size, big_endian>::Scan::global(
       }
       break;
 
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G2:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_HI12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:  // Local executable
@@ -5776,6 +5786,11 @@ Target_aarch64<size, big_endian>::Relocate::relocate(
     case elfcpp::R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case elfcpp::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
     case elfcpp::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G2:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_HI12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -6049,6 +6064,11 @@ Target_aarch64<size, big_endian>::Relocate::relocate_tls(
       // We shall never reach here.
       break;
 
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G2:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0:
+    case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_HI12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12:
     case elfcpp::R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -6061,11 +6081,21 @@ Target_aarch64<size, big_endian>::Relocate::relocate_tls(
 	    AArch64_address aligned_tcb_size =
 		align_address(target->tcb_size(),
 			      tls_segment->maximum_alignment());
-	    return aarch64_reloc_funcs::template
-		rela_general<32>(view,
-				 value + aligned_tcb_size,
-				 addend,
-				 reloc_property);
+	    value += aligned_tcb_size;
+	    switch (r_type)
+	      {
+	      case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G2:
+	      case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G1:
+	      case elfcpp::R_AARCH64_TLSLE_MOVW_TPREL_G0:
+		return aarch64_reloc_funcs::movnz(view, value + addend,
+						  reloc_property);
+	      default:
+		return aarch64_reloc_funcs::template
+		  rela_general<32>(view,
+				   value,
+				   addend,
+				   reloc_property);
+	      }
 	  }
 	else
 	  gold_error(_("%s: unsupported reloc %u "

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