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On 13 Nov 10:38, H.J. Lu wrote: > On Thu, Nov 13, 2014 at 10:06 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > > On 12 Nov 07:58, H.J. Lu wrote: > >> On Wed, Nov 12, 2014 at 5:55 AM, Ilya Tocar <tocarip.intel@gmail.com> wrote: > >> > Hi, > >> > > >> > Recent release of Intel ISA reference [1] has 4 new ISA extensions: > >> > CLWB,PCOMMIT,AVX512IFMA,AVX512VBMI. > >> > Attached patch adds support for them. > >> > Ok for trunk? > >> > > >> > 1:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf > >> > >> Please break it into 4 patches, one for each CPUID feature bit. > >> > >> Thanks. > >> > > This part adds pcommit. > > 1. Please add .pcommit directive and document it. > 2. Please use > > 0x660fae, 0xf8, 2, > > instead of > > 0x660faef8, 0, 3, > > in i386-opc.tbl? > > 3. > > + /* PREFIX_0FAEF8 */ > + { > + { RM_TABLE (RM_0FAE_REG_7) }, > + { Bad_Opcode }, > + { "pcommit", { Skip_MODRM } }, > + }, > + > /* PREFIX_0FB8 */ > { > { Bad_Opcode }, > @@ -11763,7 +11771,7 @@ static const struct dis386 mod_table[][2] = { > { > /* MOD_0FAE_REG_7 */ > { PREFIX_TABLE (PREFIX_0FAE_REG_7) }, > - { RM_TABLE (RM_0FAE_REG_7) }, > + { PREFIX_TABLE (PREFIX_0FAEF8) }, > }, > > is wrong. Please add prefix table to RM_0FAE_REG_7. > Done.
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